Deep-scaled CMOS technologies have provided ultra-high speed devices and enabled the possibility to achieve integrated millimeter wave and sub-millimeter wave systemon-a-chip (SoC). However, the drawbacks and constraints of deep-scaled technologies require not only creative circuit design ideas but also accurate active device models and optimum physical design. The paper presents a systematic d...

The advent of deep sub-micron and nanometric regime for CMOS semiconductor technology has resulted in several restrictions in the physical design of VLSI circuits primarily through constraints imposed by interconnects. These constraints typically include the interconnect delay, congestion, cross-talk, power dissipation and others. These issues have to be considered in the physical design of VLS...

PROEFSCHRIFT ter verkrijging van de graad van doctor aan de Technische Universiteit Delft, op gezag van de Rector Magnificus Prof.dr.ir. J.T. Fokkema, voorzitter van het College voor Promoties, in het openbaar te verdedigen op maandag 3 november om 15:00 uur. Het onderzoek beschreven in dit proefschrift in financieel ondersteund door de Stichting voor Technische Wetenschappen (STW). All rights ...

BACKGROUND & OBJECTIVES Odontogenic cysts are among the most frequent destructive lesions of jaws which their pathogenesis and growth mechanism are not cleared. With respect to different roles of mast cells, they may play a role in the pathogenesis and growth of odontogenic cysts. The aim of present study was to evaluate mast cells in the most common odontogenic cyst. METHODS Thirty paraffin-...

SUMMARY As IC fabrication technology enters a deep-submicron region with device feature sizes <0.35m, interconnect becomes the most dominant factor in design of high-speed Application Specic Integrated Circuits (ASICs). This paper proposes a novel methodology for automated data-path synthesis of such circuits and outlines algorithms to support it. In contrast to other approaches, we formulate i...

The measured performance of sub-micron Si:SiGe Schottky gated HFETs is compared to Si nMOSFETs. To allow an up-to-date comparison between Si and strained-Si FETs, the different device types have been studied in their respective technologies. RF performance as given by the cut-off and maximum oscillation frequency is given as a function of input power. The evaluation highlights the current immat...

Industrial Sawyer motor technology has existed for nearly three decades, traditionally being operated as open-loop positioners. Such systems can attain micron level motion resolution and open-loop repeatability of 10 m. This paper outlines a optical sensing technique for Sawyer motors which is capable of sub-micron resolution. Such a sensor can easily be integrated into a motor enabling closed-...

purpose: to evaluate the corneal endothelial cell density and polymegathism one year after laser assisted keratomileusis using mitomycin c. methods: one hundred and three eyes from 52 patients who underwent laser assisted sub-epithelial keratomileusis using mitomycin c 0.02% for 30 seconds entered this study. corneal endothelial cells were evaluated using specular microscopy before and one year...

The theory of latency insensitive design is presented as the foundation of a new correct by construction methodology to design complex systems by assembling Intellectual Property components. Latency insensitive designs are synchronous distributed systems and are realized by composing functional modules that exchange data on communication channels according to an appropriate protocol. The protoc...

As critical geometries shrink to the 45nm region and beyond, lithographic limitations have led to rising intraand inter-die process variations. Increased variability makes it significantly difficult to accurately model transistor behavior on silicon, and often probabilistic methods are required [1]. The consequent loss in silicon predictability implies that design uncertainties become severe an...