A novel ultra-high compliance, low power, very accurate and high output impedance current output stage (COS) with extremely high output current drive capability is proposed in this paper. The principle of operation of this unique structure is discussed, its most important formulas are derived and its outstanding performance is verified by HSPICE simulation in TSMC 0.18µm CMOS, BSIM3, and Level4...

Silicon VDMOS power MOSFET technology is being supplanted by UMOS (or trench) power MOSFET technology. Designers of spaceborne power electronics systems incorporating this newer power MOSFET technology need to be aware of several unique threats that this technology may encounter in space. Space radiation threats to UMOS power devices include vulnerabilities to SEB, SEGR, and microdose. There ha...

This paper presents a new method to reduce consumption power in flash ADC in 65nm CMOS technology. This method indicates a considerable reduction in consumption power, by removing comparators memories. The simulations used a frequency of 1 GHZ, resulting in decreased consumption power by approximately 90% for different processing corners. In addition, in this paper the proposed method was desig...