We present a new approach to fabricate an integrated power pack by hybridizing energy harvest and storage processes. This power pack incorporates a series-wound dyesensitized solar cell (DSSC) and a lithium ion battery (LIB) on the same Ti foil that has double-sided TiO2 nanotube (NTs) arrays. The solar cell part is made of two different cosensitized tandem solar cells based on TiO2 nanorod arr...

Higher levels of integration have led to a generation of integrated circuits for which power dissipation and reliability are major design concerns. In CMOS circuits, both of these problems are directly related to the extent of circuit switching activity. The average number of transitions per second at a circuit node is a measure of switching activity that has been called the transition density....

This thesis explores the challenges for integrating embedded static random access memory (SRAM) and non-volatile memory—based on ferroelectric capacitor technology—into low-power integrated circuits. First considered is the impact of process variation in deep-submicron technologies on SRAM, which must exhibit higher density and performance at increased levels of integration with every new semic...

Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology for process variability aware design by incorporating the major challenge of statistical circuit performance relating the device and circuit level variation in an accurate and effici...

This paper presents the design and test results of an eight-channel prototype integrated circuit chip intended to greatly simplify the pulse-processing electronics needed for large arrays of scintillation detectors. Because the chip design employs (user-controlled) multi-region charge integration, particle identification is incorporated into the basic design. Each channel on the chip also conta...

This paper illustrates the design of low-power, high-performance SR flip-flop. The speedy technical trends are engrossing to decrease the geometrical feature size and power consumption of the integrated circuit in VLSI designs. The proposed design shows the comparison with conventional CMOS circuit on the basis of power consumption and propagation delay and can save up to a significant amount o...

We propose a new methodology for post-silicon power validation using the captured thermal infrared emissions from the back-side of operational integrated circuits. We first identify the challenges associated with thermal to power inversion, and then we address these challenges by devising a quadratic optimization formulation that incorporates Tikhonov filtering techniques to find the most accur...

A single-chip dual-band power amplifier monolithic microwave integrated circuit (MMIC) operating at 3.5V single supply has been developed for both WLAN 2.4GHz and 5.2GHz with IEEE 802.11b/g/a standards applications. The MMIC utilizes the process of WINs Corp. with an InGaP/GaAs HBT process. The dual-band power amplifier constructed based on the design of adaptive RF bias choke circuits and prop...

ABSTRACT This paper describes a low power low noise mixed analog-digital PDFE (particle detector front-end) custom chip developed by IMEC for ESA and intended for scientific energetic particle space born instrumentation (spectroscopy). The ASIC (application-specific integrated circuit) is designed in a standard 0.7-μm CMOS process. The chip comprises a charge sensitive amplifier, a semi-gaussia...

Power Integrity (PI), as it relates to everyday life, is the stability and robustness of the electrical power supply to homes and businesses. For example, how stable is the 115V AC supply voltage level? How stable is its frequency (60 cycles a second) that determines time accuracy in simple electrical clock mechanisms? How steady is this supply when an air-conditioner system's large compressor ...