Abstraction and generalization of layout design cases generate new knowledge that is more widely applicable to useion and generalization of layout design cases generate new knowledge that is more widely applicable to use than specific design cases. The abstraction and generalization of design cases into hierarchical levels of abstractions provide the designer with the flexibility to apply any l...

Introduction Various attempts have been made to apply evolutionary algorithms (EAs) to complex engineering layout designs. EAs are powerful optimisation techniques inspired by genetics and natural selection while lacking some important characteristics (prior knowledge) that make other classical and numerical search algorithms very effective. Case-based reasoning (CBR) technique is to solve the ...

The typical description of a VLSI layout is the geometrical description of masks. Layout verification [4] is the testing of a layout to see if it satisfies design and layout rules. An important problem in layout verification is layout device extraction, which involves detection of capacitors, resistors, transistors etc. from the geometrical description of masks. The layout extraction process st...

This paper presents the complete design methodology of a very low-voltage ∆Σ third-order modulator from highlevel specifications down to layout. Behavioral models taking into account cell non-idealities are developed and used to map performance specifications to lower levels. Emphasis has been made on eventual design reuse through design plans and layout templates in a layout-oriented circuit d...

The Full Adders (FAs) constitute the essential elements of digital systems, in a sense that they affect the circuit parameters of such systems. With respect to the MOSFET restrictions, its replacement by new devices and technologies is inevitable. QCA is one of the accomplishments in nanotechnology nominated as the candidate for MOSFET replacement. In this article 4 new layouts are presente...