By adding a few logic gates and one or two modeling flip-flops to the circuit under test (CUT), we create a detection or diagnostic automatic test pattern generation (ATPG) model of transition delay faults usable by a conventional single stuck-at fault test pattern generator. Given a transition delay fault pair, the diagnostic ATPG model can either find an exclusive test or prove the equivalenc...

This paperpresent~ an alternative modeling and simulation method for CMOS bridging faults. The significance of the method is the introduction of a set of unique-bridge tables which characterize the bridged outputs for each bridge and a set of unique-cell tables which characterize how each cell interprets an analog input. These two sets of tables are derived dynamically for a specific design by ...

In this paper the e ects of simultaneous memory access on the fault modeling for two-port memories are investigated. New fault models and their march tests are presented. The obtained tests are of order O(n), which makes them less practical for larger two-port memories. However, the complexity can be reduced to O(n), when the memory topology is taken

Seismic modeling aids the geophysicists to have a better understanding of the subsurface image before the seismic acquisition, processing, and interpretation. In this regard, seismic survey modeling is employed to make a model close to the real structure and to obtain very realistic synthetic seismic data. The objective of this study is to analyze the resolution and illumination of the fault by...

The design and analysis of fault diagnosis architectures using the model-based analytical redundancy approach has received considerable attention during the last two decades. One of the key issues in the design of such fault diagnosis schemes is the eeect of modeling uncertainties on their performance. This paper describes a fault diagnosis algorithm for a class of nonlinear dynamic systems wit...

We propose a StochAstic Fault diagnosis AlgoRIthm, called Safari, which trades off guarantees of computing minimal diagnoses for computational efficiency. We empirically demonstrate, using the 74XXX and ISCAS85 suites of benchmark combinatorial circuits, that Safari achieves several orders-of-magnitude speedup over two well-known deterministic algorithms, CDA∗ and HA∗, for multiple-fault diagno...

The instruction decoder is one of the most complex and least regular logic structures in a modern processor that attempts to process multiple variable-length CISC instructions per cycle. This structure consumes a significant amount of area and is heavily utilized, making it vulnerable to logic soft errors. This paper analyzes a parallel decoder using gate-level modeling and statistical fault in...

This paper presents a new approach to the design of a robust observer-based fault detection scheme for diagnosing incipient faults, called H∞ robust fault detection observer (RFDO). It takes into account the robustness of the fault detection observer against disturbances and sensitivity to faults simultaneously. The approach has originated from the robust H∞ estimator which minimizes the effect...

Model uncertainty is an important factor hindering reliability of any modelbased failure detection and identification (FDI) method. Use of joint torque sensing reduces significantly the complexity of robot modeling by excluding hardly-identifiable link dynamics from overall manipulator dynamics. Application of such model in the proposed FDI filter increases reliability of fault monitoring again...