Edge detection from images is one of the most important concerns in digital image and video processing. Edge detection is very useful in computer vision for extracting meaningful information from images. Real time edge detection is implemented on the platform that consists of the TMS320DM6437 DSP, camera, TV tuner, Display and canny edge detection algorithm. The main goal of our technique is to...

The ASP consists of several components: a digital beat-frequency oscillator (BFO), selectable band-pass filters for CW, SSB and other digital modes, a denoiser based on the least-mean-squares (LMS) technique and a Wiener-filter autonotcher (removing carriers or heterodynes). Several advanced concepts are applied in this project, such as multirate processing, adaptive filtering and frequency shi...

This paper introduces a modification to an index calculus representation for the Double-Base Number System (DBNS). The DBNS uses the bases 2 and 3; it is redundant (very sparse) and has a simple two-dimensional representation. An extremely sparse form of the DBNS uses a single non-zero digit to represent any real number with arbitrary precision. In this case the single digit can be identified b...

The paper presents a method for sparse matrix multiplication on a DSP processor. Its high efficiency is a consequence of the proposed pseudo-random data memory access and parallelism of the multifunctional instructions of a DSP. Sparse matrix multiplication is implemented as linear expanded DSP code automatically generated by specially designed program. The method is applied to predictive vecto...

| This paper presents 16-bit DSP processor and system for baseband and voiceband processing of IS-136 digital cellular telephony that is North America TDMA standard. The DSP, named MIGHTI, that is designed for mobile communication applications, has some special instructions that allow instruction pipelining for the compound operations. MIGHTI includes a low-power 16K-word exible port fullcustom...

In this paper, the implementation of a digital signal processor (DSP) based multi-format decoder for an IP set-top box is described. Using several software optimization techniques, the multi-format decoder has been fitted into a TMS320DM641 DSP @ 480 Mhz. Starting from a native C code implementation, a six-step software optimization process has been applied to improve the decoder performance. C...

In this paper we designed a low hardware cost and fast DSP unit for 32-bit embedded EISC (Expanded Instruction Set Computer) microprocessor. The DSP unit operates as a functional unit of a integer core. This architecture can reduce the hardware cost and control easily the pipeline of the processor. The MAC/MAS unit was designed using hybrid radix-4/radix-8 Booth algorithm to reduce the hardware...

Abstract. This paper use the digital signal processor (DSP) TMS320LF2407A control chip is adopted as core of the control system. Three closed loop of the controller, namely electricity, speed and displacement, were designed. Using space voltage vector pulse wide modulation technology (SVPWM), constructed a servo system of permanent magnet synchronous motor(PMSM) based on DSP. Through debugging ...

The paper presents a DSP-based design and control of three-axis servo motion system that effectively divides tasks between the master terminal four slave drives. proposed architecture enhances immediacy platform positioning integration software hardware. utilizes high-accuracy encoder as reference value for accuracy improvement integrates firmware via embedded execution program, thereby reducin...

This paper presents an integrated environment for development of real-time digital control systems. It constitutes a pilot project in the real-time aspect using Digital Signal Processor (DSP). The hardware platform is composed by a Master-Slave DSP board and the software platform has a friendly user interface. It is intended to generate a basic real-time tool library that will allow others rese...