A low-side switch is a MOSFET or an IGBT that is connected to the ground-referenced and is not floating. In a boost converter, the source terminal of the MOSFET is connected to the circuit ground, which is referred to a low-side MOSFET. To switch an N-channel MOSFET of a boost converter on, the V should be in the order of 10 to 20V. Since the source terminal is grounded, this implies that the g...

A vertical-cavity surface-emitting laser (VCSEL) driver design that utilizes a novel push-pull circuit topology is described. The VCSEL driver design can provide both a current pushing and a current pulling mechanism and therefore is capable of producing symmetric rise and fall times. The design was implemented in a 0.18-microm foundry n-well complementary metal-oxide semiconductor technology a...

This paper explores the use of interconnect signaling techniques to improve Delay time for performance and reduce power consumption of On-chip interconnect. The various Driver–Receiver pairs such as ddc-db, asf-lc, mj-sib and mj-db for On-chip interconnect with different capacitive load at the output of the circuit are being explored in detail. A detailed comparison of the driver-receiver pairs...

We propose a novel 50 Mb/s optical transmitter fabricated in a 0.6 μm BiCMOS technology for automotive applications. The proposed VCSEL driver chip was designed to operate with a single supply voltage ranging from 3.0 V to 5.25 V. A fully integrated feedforward current control circuit is presented to stabilize the optical output power without any external components. The experimental results sh...

Test results show that the scheme of the self-calibration works very well. Fig. 1 shows that the output of the binary weighted current mode driver has good linearity. Fig. 2 shows the driver’s output accuracy with or without the self-calibration (test result). The switches Qx automatically turned on or off while the reference voltage of current mode driver changes. Without the selfcalibration, ...

This paper explores the use of interconnect signaling techniques to improve Delay time for performance and reduce power consumption of On-chip interconnect. The various Driver–Receiver pairs such as ddc-db, asf-lc, mj-sib and mj-db for On-chip interconnect with different capacitive load at the output of the circuit are being explored in detail. A detailed comparison of the driver-receiver pairs...

In this paper we present a new multichannel high voltage driver box to connect up to six MOEMS mirror devices to it that have resonant and also quasistatically driven actuating electrodes. It is possible to drive all resonant axes synchronously while the amplitude of them can individually be controlled by separate microcontrollers that also operate the quasistatic axes. Circuit simulations are ...

This paper presents an overview of recent advances on modeling and layout optimization of devices and interconnects for high-performance VLSI circuit design under the deep submicron technology. First, we review a number of interconnect and driver/gate delay models, which are most useful to guide the layout optimization. Then, we summarize the available performance optimization techniques for VL...