A new method of test-per-clock BIST design for combinational circuits is proposed. The fundamental problem of matching the PRPG outputs with the required test patterns is solved as a general design problem in the field of combinational logic. A test set generated by an ATPG is compared with the PRPG generated sequence. The solution is based on a novel search algorithm, which identifies the best...

An elaborate analysis for various hardware implementations of digital filters is presented in this paper. A bit-true model of a sample digital filter is extracted from simulation based on the effects of finite word-length arithmetic. According to the extracted implementation parameters, four different hardware implementation methods are explored and compared. The bit-true model is described in ...

The test generation problem for a sequential circuit capable of generating tests with combinational test generation complexity can be reduced to that for the combinational circuit formed by replacing each FF in the sequential circuit by a wire. In this paper, we consider an application of this approach to general sequential circuits. We propose a test generation method using circuit pseudo-tran...

Nowadays, multimedia developed so quickly that we are overwhelmed by all sorts of images in our daily life, including the images on the billboard, internet websites, magazines as well as TV shows. However, some images are easily forgotten while others remain stable memory in people’s mind. As has been proved, images have inner characteristics that decide how memorable they are. So far, many dif...

Combinational equivalence checking (CEC) is a mainstream application in Electronic Design Automation used to determine the equivalence between two combinational netlists. Tools performing CEC are widely deployed in the design flow to determine the correctness of synthesis transformations and optimizations. One of the main limitations of these tools is their scalability, as industrial scale desi...

In the growing housing sector, new technology, products and materials are continuously being introduced. The design and construction teams need tremendous efforts and time to choose the appropriate combination of technology, products and materials from the vast array of possibilities available in order to fulfil client’s requirements within budget. The self-builders and general clients are not ...

A combinational circuit can be tested for the presence of a single stuck-at fault by applying a set of inputs that excite a verifiable output response in that circuit. If the fault is present, the output will be different than it would be if the fault were not present. Given a circuit, the goal of an automatic test pattern generation system is to generate a set of input sets that will detect ev...

The vehicle routing problem (VRP) is one of the most important combinational optimization problems that has nowadays received much attention because of its real application in industrial and service problems. The VRP involves routing a fleet of vehicles, each of them visiting a set of nodes such that every node is visited by exactly one vehicle only once. So, the objective is to minimize the to...

This paper presents accurate estimation of signal activity at the internal nodes of CMOS combinational logic circuits. The methodology is based on stochastic model of logic signals and takes correlations and simultaneous switching of signals at logic gate inputs into consideration. In combinational logic synthesis, in order to minimize spurious transitions due to nite propagation delays, it is ...