Studies on the evolutionary history of ascomycetes in terms of time scale will help to understand historical patterns that shape their biodiversity. Until now most of dating studies of ascomycetes have focused on major events in fungal evolution but not on divergence events within smaller groups of fungi e.g. within Sordariomycetes. We used molecular dating to estimate the time of separation of...

On-chip optical clock distribution is being investigated as a fbture means to increase clock speed and reduce clock power. While extremely small skew in the arrival of an on-chip optical signal can be achieved, the conversion of the optical signal to a local electrical clock may be subject to substantial variation. A baseline receiver circuit has been designed and fabricated. We find that sensi...

In this paper, we investigate reducing the power consumption of a synchronous digital system by minimizing the total power consumed by the clock signals. We construct activity-driven clock trees wherein sections of the clock tree are turned off by gating the clock signals. Since gating the clock signal implies that additional control signals and gates are needed, there exists a tradeoff between...

We propose a temporal extension of Datalog which can be used to model and query temporal databases with relations based on multiple clocks. The extension, called Clocked Temporal Datalog, is based on a clocked temporal logic in which each predicate and hence each formula can be assigned a separate clock. A Clocked Temporal Datalog program consists of three parts: (1) a clock definition, (2) a c...

In SoC design, multiple buffered clock distribution networks are typically used to drive the large clock loads of the different clock domains. Chip design involves a clock alignment step, which equalizes the delay from the clock source to each and every flop. Accurate clock alignment is important, because unwanted differences or uncertainties in clock network delays may degrade performance or c...