This paper considers the problem of estimating the power consumption at logic and register transfer levels of design from an information theoretical point of view. In particular, it is demonstrated that the average switching activity in the circuit can be calculated using either entropy or informational energy averages. For control circuits and random logic, the output entropy (informational en...

Improvements in optical technology will enable the construction of high bandwidth, low latency switching networks. These networks have many applications in massively parallel processing. However current circuit switching and packet switching techniques are not quite suitable for controlling such networks. Time division multiplexing (TDM) schemes can improve the performance of circuit switched o...

Due to the trade-off between power, area and performance, various efforts have been done. This work is also based to reduce the power dissipation of the vlsi circuits with the performance upto the acceptable level. The dominant term in a well designed vlsi circuit is the switching power and low-power design thus becomes the task of minimizing this switching power. So, to design a low-power vlsi...

In this paper, we propose a modeling approach that captures the dependence of the power dissipation of a (combinational or sequential) logic circuit on its input/output signal switching statistics. The resulting power macromodel, consists of a quadratic or cubic equation in four variables, that can be used to estimate the power consumed in the circuit for any given input/output signal statistic...

Estimating peak power involves optimization of the circuit’s switching function. The switching of a given gate is not only dependent on the output capacitance of the node, but also heavily dependent on the gate delays in the circuit, since multiple switching events can result from uneven circuit delay paths in the circuit. Genetic spot expansion and optimization are proposed in this paper to es...

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at Vin/2 voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switc...

This study presents a two-switch continuous conduction mode pulse width modulation flyback converter that employs an LC snubber circuit. The snubber circuit is used to achieve zero voltage switching (ZVS) operation for the main switches during the turn-off transition and soft switching for power diodes. With the proposed LC snubber, the magnetic energy in the transformer leakage inductance can ...

In this paper, we propose a new router architecture that supports wormhole switching and circuit switching concurrently. This architecture has been designed to take advantage of temporal communication locality. This can be done by establishing a circuit between nodes that are going to communicate frequently. Messages using those circuits face no contention. By combining circuit switching, pre-e...

ISSN 2250 – 1088 | © 2011 Bonfring Abstract--This paper is a detailed study on methods of battery charging with Buck Resonant converter using soft switching techniques like ZVS and ZCS. This study also presents the circuit configuration with the least components to realize a highly efficient solar energy battery charger with a zero-voltage and zero current switching resonant converter. The high...

Low power test set is generated by merging of the skewed load test cubes that are extracted from the functional broadside tests. The use of functional broadside tests ensures that switching activity of the extracted tests does not exceed that possible during functional operation of the circuit. As the switching activity is prevented from exceeding the switching activity that the circuit is desi...