This article describes the design of a 32 Gb/s four-level pulse amplitude modulation (PAM- 4) optical transceiver in 40 nm CMOS technology. At transmitter side, laser driver is composed an asymmetric waveform equalizer, 3-tap feed-forward equalizer (FFE), and novel active-back termination (ABT) circuit. The ABT circuit provides self-tracking, tunable source impedance to match characteristic dif...

Multipliers are one of the most important building blocks in processors. This paper describes a low-power 32×32-bit parallel multiplier, designed and fabricated using a 0.13 μm double-metal doublepoly CMOS process. In order to achieve low-power operation, the multiplier was designed utilizing mainly pass-transistor logic circuits, without significantly compromising the speed performance of the ...

−This paper presents the design, fabrication and characterization of a 32 by 32 electroplated micromirror array on a glass, a low cost substrate. Approaches taken in this work for the fabrication of micromachined mirror arrays include a line addressing scheme, a seamless array design for high fill factor, planarization techniques of polymeric interlayers, a high yield methodology for the remova...

The technique for hardware multiplication based upon Fourier transformation has been introduced. The technique has the highest efficiency on multiplication units with up to 8 bit range. Each multiplication unit is realized on base of the minimized Boolean functions. Experimental data showed that this technique the multiplication process speed up to 20% higher for 2 − 8 bit range of input operan...