In the companion paper [l], a programmable architecture for digital signal processing is proposed that requires the partitioning of a signal processing task into multiple programs that execute concurrently. In this paper, a synchronous dataflow programming method is proposed for programming this architecture, and programming ex-

Abstract This article is focused on the simulation and implementation of simple fuzzy logic excitation control of a synchronous generator. In MATLAB/SIMULINK is simulated model of the synchronous generator connected to an AC system. A simple fuzzy logic control scheme is simulated for voltage control and generator stabilization. This simulation is compared with the behaviour of the real laborat...

In this paper, an additive self-tuning (ST) control scheme is presented for a static synchronous series compensator (SSSC) to improve performance of conventional PI control system for damping sub-synchronous resonance (SSR) oscillations. The active and reactve series compensation are provided by a three-level 24-pulse SSSC and fixed capacitor. The proposed ST controller consists of a pole shift...

Digital electronic systems typically use synchronous clocks and primarily assume fixed duration of their operations to simplify the design process. Time elastic systems can be constructed either by replacing the clock with communication handshakes (asynchronous version) or by augmenting the clock with a synchronous version of a handshake (synchronous version). Time elastic systems can tolerate ...

The paper is concerned with the timing analysis of a class digital systems we call mixed asynchronous{synchronous systems. In such a system, each computation module is either synchronous (i.e. clocked) or asynchronous (i.e. selftimed). The communication between modules is assumed to be selftimed for all modules. We introduce a graph model called MASS for describing the timing behaviour of such ...

Computer architecture researchers evaluate key areas such as pipelining, organization, instruction issue, branching, and exception handling when considering asynchronous and synchronous design and implementation trade-offs. Asynchronous or clockless designs are considered as an alternative to conventional synchronous digital system design. The major advantages of asynchronous are low power cons...

The paper is concerned with the timing analysis of a class digital systems we call mixed asynchronous{synchronous systems. In such a system, each computation module is either synchronous (i.e. clocked) or asynchronous (i.e. selftimed). The communication between modules is assumed to be selftimed for all modules. We introduce a graph model called MASS for describing the timing behaviour of such ...

Computer architecture researchers evaluate key areas such as pipelining, organization, instruction issue, branching, and exception handling when considering asynchronous and synchronous design and implementation trade-offs. Asynchronous or clockless designs are considered as an alternative to conventional synchronous digital system design. The major advantages of asynchronous are low power cons...

| We describe a VLSI{based data acquisition to perform X{Y coincidences with a two side microstrip digital detector, optimized for applications in digital mammogra-phy. A two components chip set is described in detail: a low noise Front{End analog ampliier and an 80 MHz synchronous digital encoder. These two components can be used to solve the problems arising with the use of a large number of ...