A fully integrated low-IF receiver for 1.8GHz in 0.13-μm CMOS is presented. The receiver consists of a VCO, an IQ-divider, an LNA, and a double balanced IQ-mixer. The RF input stage and the commutating stage of the IQ-mixer are current coupled via an on-chip transformer which is operating in resonant mode and is performing a current gain. A design method is presented to reduce the input impedan...

Compact low-voltage power-efficient operational amplifiers are described that are very suitable as very-largescale-integration library cells because of the small die area of 0.08 mm and the minimum supply voltage of 1.8 V. A key part of the circuit is the rail-to-rail class-AB output stage with folded mesh feedback control that combines power efficiency with operation down to 1.8 V and allows s...

A sub-harmonic injection-locked tripler multiplies a 20-GHz differential input to 60-GHz quadrature (I/Q) output signals. The tripler consists of a two-stage ring oscillator driven by a single-stage polyphase input filter and 50I and Q-signal output buffers. Each gain stage incorporates a hard limiter to triple the input frequency for injection locking and a negative resistance cell with two po...

A novel CMOS operational transconductance amplifier (OTA) is presented, using a fully differential singlestage core OTA as input stage and a differential to single current converter as output stage, each biased at a separate current level. A large gain-bandwidth (GBW) product (2.7 MHz) and a high slew-rate (5 V//.LS) can be obtained by applying a large bias current to the core OTA. Due to the c...