Some data streaming applications make use of digital signal processing (DSP). The DSP algorithms include transcendental functions like trigonometry, inverse logarithms, exponentials, and other in addition to the basic arithmetic operations multiplication division. By modifying a few simple parameters, it is relatively generate large range functions, including logarithmic, exponential, trigonome...

This paper presents performance comparisons between two multipliers architectures. The first architecture consists of a pure array multiplier that was modified to handle the sign bits in 2’s complement and uses a radix-4 encoding to reduce the partial product lines. The second architecture implemented was the widely used Modified Booth multiplier. We describe a design methodology to physically ...

In this paper, new hardware architecture of multiplier and accumulator (MAC) for high speed arithmetic was designed. The performance was improved by merging multiplication with accumulation and organize a hybrid type carry save adder (CSA). The proposed CSA tree uses 1's complement based radix-4 and radix-8 modified booth algorithm(MBA). The CSA propagates the carries to the least signific...

We present a design of a high-radix on-line division suitable for long precision computations. The proposed scheme uses a quotient-digit selection function based on the residual rounding and scaling of the operands. The bounds on the number of cycles and the cycle time for radix 2 and n-bit precision are obtained in terms of full-adder delays. The speedup with respect to radix 2 is greater than...

Recently, the radix-3 representation of integers is used for the efficient implementation of pairing based cryptosystems. In this paper, we propose non-adjacent form of radix-r representation (rNAF) and efficient algorithms for generating rNAF. The number of non-trivial digits is (r − 2)(r + 1)/2 and its average density of non-zero digit is asymptotically (r − 1)/(2r − 1). For r = 3, the non-tr...

We denote by a polymorphic radix-n FFT an abstract algorithm scheme that is shared by all radix-n FFT algorithms, similar to the way polymorphic data types share. Given such polymorphic algorithm, particular radix-n algorithms can be obtained by specialization, thus need not be implemented separately. How to accomplish sharing between different radix-n algorithms is not obvious: for example the...

We present a simulation scheme based on the lattice-Boltzmann method to simulate the dynamics of charged colloids in an electrolyte. In our model we describe the electrostatics on the level of a Poisson-Boltzmann equation and the hydrodynamics of the fluid by the linearized Navier-Stokes equations. We verify our simulation scheme by means of a Chapman-Enskog expansion. Our method is applied to ...

In this paper, we proposed a new architecture of multiplier-and-accumulator (MAC) for high-speed arithmetic. This can be implement by using radix-2 booth encoder .By combining multiplication with accumulation and devising a hybrid type of carry save adder (CSA), the performance was improved. This includes the design exploration and applications of a spurious-power suppression technique (SPST) w...

In this paper, the design of a CORDIC algorithm based radix8 FFT processor is presented for real-time harmonic analyzer. The actual need of FFT is the obtaining a levels of harmonics in power signal. Generally the radix-8 FFT processor is a twiddle factor based butterfly computation. At each stage of the butterfly the twiddle factor is multiplied with the input sequence and each stage required ...