A multiplexer, sometimes referred to as a "mux", is a device that selects between a numbers of input signals. It is a combinational logic circuit. It is a unidirectional device and used in any application in which data must be switched from multiple sources to a destination. This paper represents the simulation of different 2:1 Multiplexer Structures and their comparative analysis on different ...

Adder being the basic hardware block of any arithmetic operation, the major constraint in the field of signal processors, data processors to perform any operations are highly dependent on the adder performance of the circuit. The gate level implementation of the carry select adder (CSLA) and modified carry select adder has significantly reduced the area and power consumption which replaced the ...

Among glycosaminoglycan (GAG) biosynthetic enzymes, the human β1,4galactosyltransferase 7 (hβ4GalT7) is characterized by its unique capacity to take over xyloside derivatives linked to a hydrophobic aglycone as substrates and/or inhibitors. This glycosyltransferase is thus a prime target for the development of regulators of GAG synthesis in therapeutics. Here, we report the structureguided desi...

Mode Division Multiplexing is currently investigated as a possible way to increase fiber system capacity. With this approach, different modes of the same fiber carry distinct information. One of the problems to be solved in these systems concerns coupling/decoupling of the various modes to/from the same fiber. In this presentation, the mode features of a mode mux/demux based on holey fibers are...

In order to reduce the silicon area of the chip and optimize the power of arithmetic circuits, this paper proposes a low power carry look-ahead BCD (Binary Coded Decimal) adder which uses a four bit MOCLA (Multiplexer and Or gate based Carry Look Ahead Adder) that forms the basic building block. This proposed MOCLA style uses a 2 input MUX, OR gate and GDI (Gate Diffusion Input) based full adde...

This paper presents a new low power BIST TPG scheme for reducing scan transitions. It uses a transition freezing and melting method which is implemented of the transition freezing block and a MUX. When random test patterns are generated from an LFSR, transitions of those patterns satisfy pseudo-random Gaussian distribution. The proposed technique freezes transitions of patterns using a freezing...

Silicon physical unclonable functions (PUF) utilize the variation during silicon fabrication process to extract information that will be unique for each chip. There have been many recent approaches to how PUF can be used to improve security related applications. However, it is well-known that the fabrication variation has very strong spatial correlation and this has been pointed out as a securi...

Field programmable gate arrays (FPGAs) are increasingly used as the computing platform for fast and energy efficient execution of recognition, mining, and search applications. Approximate computing is one promising method for achieving energy efficiency. Compared with most prior works on approximate computing, which target approximate processors and arithmetic blocks. Hybrid configurable logic ...

We revisit a result by Coron and Guerrero stating that the one-dimensional transport-diffusion equation ut + Mux − εuxx = 0 in (0, T )× (0, L), controlled by the left Dirichlet boundary value is zero-controllable at a bounded cost as ε → 0, when T > 4.3 L/M if M > 0 and when T > 57.2 L/|M | if M < 0. By a completely different method, relying on complex analysis, we prove that this still holds w...