Mitsubishi Electric Corporation has developed a low power baseband modem LSI for W-CDMA mobile phones. The LSI was installed in D900i, achieving approx. 170/90 minutes of continuous talk time for voice/video phones, and approx. 550/420 hours of continuous standby time in stationary/moving states respectively. The architecture of this LSI is similar to that of the baseband modem LSI chipset used...

Component importance analysis is to measure the effect on system reliability of component reliabilities, and is used to the system design from the reliability point of view. On the other hand, to guarantee high reliability of real-time computing systems, redundancy has been widely applied, which plays an important role in enhancing system reliability. One of commonly used type of redundancy is ...

Standby Power Management Architecture for Deep-Submicron Systems

Multi-component machining systems are being used in every sphere of engineering sector such as job shops, flow lines, communication system, computer system, etc. This paper presents fuzzy analysis of availability characteristics of machining system comprising of multiactive units and multi-standby units. The Markov machine repair model has been developed by incorporating the concepts of switchi...

Status of this Memo This memo provides information for the Internet community. It does not specify an Internet standard of any kind. Distribution of this memo is unlimited. This document reflects an existing deployed protocol. The IETF does have a working group which is in the process of producing a standards track protocol to address the same issues. Abstract The memo specifies the Hot Standby...

Increased downscaling of CMOS circuits with respect to feature size and threshold voltage has a result of dramatically increasing in leakage current. So, leakage power reduction is an important design issue for active and standby modes as long as the technology scaling increased. In this paper, a simultaneous active and standby energy optimization methodology is proposed for 22 nm sub-threshold...

ABSTRACT This paper proposes a sleep transistor based minimum size inverter in BSIM4.3.0, 50nm CMOS technology with supply voltage of 1V, power dissipation of 46.28nW at 0.502V and maximum drain current of 70nA. The operating frequency is kept at 1GHz, and found that it can be used up to 10GHz successfully. The reduction in power dissipation is 98.88% and operating frequency is almost 2 times t...

One of the primary concerns in any system design problem is to prepare a highly reliable system with minimum cost. One way to increase the reliability of systems is to use redundancy in different forms such as active or standby. In this paper, a new nonlinear multi- objective integer programming model with the choice of redundancy strategy and component type is developed where standby strategy ...

This paper describes an on-chip series-regulated mixed swing methodology with sleep-mode control for lowering the power consumption of high-performance DSP multiplier-accumulator (MAC) circuits. A 16*16+36-bit Overlapped bit-pair Booth recoded, Wallace tree MAC is fabricated in a commercial 0.5μm CMOS process in the proposed series-regulated methodology and conventional static CMOS. Up to 2.55X...