This document provides a description of the functionality of the proposed Comparator Toolkit, which will allow comparison to be made between the full (Geant4) simulation/reconstruction and the fast simulation (ATLFAST). We discuss typical use cases of a physicist, and indicate how these usecases can be provided for within the existing framework, whilst identifying gaps in the current methods ad...

In this Paper presents a new dynamic comparator is compared in terms of their voltage, speed and power. A new dynamic comparator which shows lower input offset voltage and high load drivability than the conventional dynamic comparators. This comparator not only achieves low offset but also exhibit high speed and low power in its operation, which can be used for low power high speed ADC applicat...

Monolithic Active Matrix with Binary Counters (MAMBO) V ASIC has been designed for detecting and measuring low energy X-rays. A nested well structure with a buried n-well (BNW) and a deeper buried p-well (BPW) is used to electrically isolate the detector from the electronics. BNW acts as an AC ground to electrical signals and behaves as a shield. BPW allows for a homogenous electric field in th...

BACKGROUND Epidemiology studies suggest that oral bisphosphonate may increase the risk of esophageal cancer. The present study aimed to investigate the association between exposure of oral bisphosphonate and risk of esophageal cancer. METHODS Using the nationwide medical claim database in South Korea, 2,167,955 subjects, who initiated osteoporosis treatment (oral bisphosphonate, intravenous b...

The impact of ageing on a high speed comparator with hysteresis in 65-nm CMOS technology using SPICE simulations is investigated. The comparator has been designed to offer immunity to single event transients. The most sensitive transistor was subjected to single events at manufacture time and after ageing, assuming a maximum parameter drift of 10% on all PMOS transistors for 10 years. It was fo...

2-bit magnitude comparator design using different logic styles is proposed in this brief. Comparison is most basic arithmetic operation that determines if one number is greater than, equal to, or less than the other number. Comparator is most fundamental component that performs comparison operation. This brief presents comparison between different logic styles used to design 2-Bit magnitude com...

In this paper, we propose two novel p-norm penalty least mean square (lp-LMS) algorithms as supplements of the conventional lp-LMS algorithm established for sparse adaptive filtering recently. A gradient comparator is employed to selectively apply the zero attractor of p-norm constraint for only those taps that have the same polarity as that of the gradient of the squared instantaneous error, w...

The sparsity-aware zero attractor least mean square (ZA-LMS) algorithm manifests much lower misadjustment in strongly sparse environment than its sparsity-agnostic counterpart, the least mean square (LMS), but is shown to perform worse than the LMS when sparsity of the impulse response decreases. The reweighted variant of the ZA-LMS, namely RZALMS shows robustness against this variation in spar...

The current study aimed to evaluate immunogenicity and safety of a newly developed diphtheria-tetanus toxoid (Td) vaccine, GC1107 (Green Cross Corporation, Yongin, Korea), in comparison with placebo and active comparator (licensed Td vaccine) in healthy Korean adults. A randomized, double-blind, placebo and active comparator-controlled study was conducted. Forty subjects were randomly administe...

The mathematical model and methods of calculation of the layout structure of comparator signal circuits with distributed parameters are presented. The algorithm of computer formulation and solving of equations of transfer functions of comparator circuits is provided. Theoretical substantiation of optimizing the micro-layout of large-scale integration circuits of parallel subnanosecond analog-to...