This paper represents a review of some existing clock gating techniques for low power dissipation in digital circuitry designs. In this paper, the clock gating techniques are used which reduces the power consumption from the normal implementation of the same design. The 16 bit ALU (arithmetic logical unit) is used for reducing the dynamic power consumption through gating techniques by shutting ...

In any integrated circuit power consumption plays a paramount role and is considered as one of the top challenges in International technology roadmap for semiconductors. In this paper, a low power circuit designed to operate in subthreshold region is proposed. Voltage scaling technique is incorporated to reduce dynamic power consumption while static or leakage power is greatly reduced with forc...

In this paper, a full adder cell based on majority function using Carbon-Nanotube Field-Effect Transistor (CNFET) technology is presented. CNFETs possess considerable features that lead to their wide usage in digital circuits design. For the design of the cell input capacitors and inverters are used. These kinds of design method cause a high degree of regularity and simplicity. The proposed des...

A 65-GHz Class-C LC oscillator designed in 65nm CMOS technology by ST Microelectronics is presented. A three spiral transformer has been used to achieve low phase noise and low power consumption. Post-layout simulations show a phase noise is equal to -88.4 dBc/Hz at 1-MHz offset from the carrier (65.8 GHz). The power consumption is 14 mW with 1.2-V supply voltage. The oscillator is capable to o...

In this thesis we investigate the feasibility of using information overheard by wireless devices to reduce their overall energy consumption for communications. Specifically we investigate the hypothesis “It is more efficient in terms of energy consumption to constrain the transmission power based upon a combination of received signal strength with a minimally extended MAC, than to utilise an un...

A fully integrated GMSK modulator in DRRS band is presented. All components of the transmitter except the power amplifier, including the loop filter and the oscillator are on-chip. Transistor and system level simulations demonstrate that the modulator meets the performance requirements of the DRRS standard. The circuit power consumption of the modulator at 1.4GHz is 37mW with a single 3V power ...

Processors having both low-power consumption and high-performance are more and more required in the portable systems market. Although it is easy to nd processors with one of these characteristics, it is harder to nd a processor having both of them at the same time. In this paper, we evaluate the possibility of designing a high-performance, low-consumption processor and investigate whether instr...

Low power consumption is a primary concern in many CMOS image-sensor applications. As the resolution of these sensors has increased while maintaining or increasing their frame rates, A/D conversion has become the dominant component of power consumption [1]. Conventional image compression can help reduce the readout rate [2] (and hence its power consumption), but cannot reduce the A/D conversion...

In the ultra low power end of design spectrum when performance is of secondary importance, digital subthreshold logic circuits are more applicable than the regular MOS logic. In this paper, we propose two different subthreshold logic families: 1) variable threshold voltage subthreshold CMOS (VT-Sub-CMOS) and 2) subthreshold dynamic threshold voltage MOS (SubDTMOS) logic. Both these logic famili...