نتایج جستجو برای: layered t gate

تعداد نتایج: 776318  

In this paper, we propose a new heterostructure dual material gate junctionless field-effect transistor (H-DMG-JLFET), with negative differential resistance (NDR) characteristic. The drain and channel material are silicon and source material is germanium. The gate electrode near the source is larger. A dual gate material technique is used to achieve upward band bending in order to access n-i-p-...

Journal: :IEEE Embedded Systems Letters 2021

The graphical processing unit (GPU), as a digital signal accelerator for cloud RAN, is investigated. This letter presents new design 5G NR low-density parity check code decoder running on GPU. algorithm flexibly adaptable to GPU architecture achieve high resource utilization well low latency. It improves the layered by increasing parallelism single word. flexible (on 24 core GPU) was found have...

Journal: Journal of Nanoanalysis 2020

In this paper, the electrical performance of double gate organic field effecttransistor (DG-OFET) are thoroughly investigated and feasibility of the deviceas an efficient biosensor is comprehensively assessed. The introduced deviceprovides better gate control over the channel, yielding better charge injectionproperties from source to channel and providing higher on-state...

Journal: :journal of mining and environment 2016
h. mohammadi m. a. ebrahimi farsangi h. jalalifar a. r. ahmadi a. javaheri

in advance longwall mining, the safety of mine network, production rate, and consequently, economic conditions of a mine are dependent on the stability conditions of gate roadways. the gate roadway stability is a function of two important factors: 1) characteristics of the excavation damaged zone (edz) above the gate roadway and 2) loading effect due to the caving zone (cz) above the longwall w...

1999
Radu Marinescu

In spite of the intense efforts of metrics researches, the impact of object-oriented software metrics is for the moment still quite reduced. The cause of this fact lies not in an intrinsic incapacity of metrics to help assessing and improving the quality of object-oriented systems, but in an unsystematic, dispersed and ambiguous manner of defining and using the metrics. In this paper we define ...

2005
Kristen Parton Aaron Bell Sowmya Ramachandran

This paper presents the EarthTutor authoring tool, a multi-layered system designed to remove the technical hurdles preventing teachers from having full control over the structure of their lessons, without sacrificing the power and technical flexibility required for an effective ITS implementation. EarthTutor reduces the ITS design problem to a series of related but independent layers. Each laye...

2004
Dae-Hyun Kim Kwang-Seok Seo

In this paper, a novel gate technology with triple shaped gate structure has proposed and developed in order to suppress unwanted gate fringing capacitance. Because high gate stem height was difficult to fabricate by means of conventional direct electron beam (E-Beam) lithography method, additional PMGI sacrificial layer was utilized in this new scheme. Increasing gate stem height as an amount ...

1971
Michael A. Arbib

We present the notion of d is t r ibuted computation in a layered somatotopically organized computer, present the Pitts-McCulloch scheme for obtaining standard forms, provide anarchic networks for b a l l i s t i c and tracking modes of behaviour, and relate th is to the v isuomotor ac t i v i t y of the f rog.

2014
Alex Bocharov Martin Roetteler Krysta M. Svore

Techniques to efficiently compile higher-level quantum algorithms into lower-level fault-tolerant circuits are needed for the implementation of a scalable, general purpose quantum computer. Several universal gate sets arise from augmenting the set of Clifford gates by additional gates that arise naturally from the underlying fault-tolerance scheme. Examples are the Clifford+T basis which arises...

2010
Yanqing Deng Rajvi Rupani James Johnson Scott Springer

The High-K Metal Gate (HKMG) technology has become the keystone to reduce gate leakage and enable the continuous scaling of transistors towards 32nm node and beyond. However, the reduction of gate leakage in 32nm HKMG PD (Partially Depleted)-SOI (Silicon-On-Insulator) CMOS (Complementary Metal–Oxide–Semiconductor) inevitably changes the modeling methods for gate current, floating body effect, a...

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