The emerging technology of programmable logic devices enables a new kind of architecture for massively parallel. For such systems the traditional way of chip configuration is not useful anymore. This paper presents a concept for configuring massively parallel reconfigurable architectures. Furthermore a proof of concept is given by applying the configuration scheme to an reconfigurable architect...

In this project, an in-house built bipedal walking Robot uses two direct current gear motors to power its legs. Each leg could bend at the knee to assist the walking routines. In order to improve the walking step, a stabilization system is designed through a mechanical and field programmable gate array controller to improve the walking condition. In addition, the robot is able to prevent hittin...

Most of existing field programmable gate array (FPGA) based watermarking algorithms have two primary weaknesses, large overhead and robustness. In this work, a robust low-overhead watermarking algorithm is proposed for intellectual property (IP) protection. The ownership is split into orderly small watermarks. The watermark positions are generated by the watermarks. Location mapping is performe...

The paper discuses the basic results from design and analysis of Field Programmable Gate Array (FPGA) based microcontroller for Voice Message (VM) system. The conditions that the system must answer, its architecture and instruction set are defined. The whole project, called VMCore, is implemented in VHDL and is tested on Altera ACEX 1K FPGA device.

This paper presents a real-time method to compensate for the variable cyclic error in a homodyne laser interferometer. The parameters describing the quadrature signals of the interferometer are estimated using simple peak value detectors. The cyclic error in the homodyne laser interferometer was then corrected through simple arithmetic calculations of the quadrature signals. A field programmabl...

We developed a highly integrated, Field Programmable Gate Array (FPGA)-based digital multi-frequency eddy current platform which is capable of detecting surface breaking and subsurface cracks in non-magnetic plates. Excitation signal generation, receiving signal demodulation, and USB communication were all implemented inside a Xilinx FPGA (Spartan III). Multi-frequency test results provide rich...

The paper proposes mvTANTs , three-level networks with multiple-valued inputs and binary outputs. These networks are a generalization of binary T A N T s (Three level And Not networks with True Inputs). One of possible interpretations of m v T A N T is a four-level binary network with input decoders which realize multiplevalued literals. Similarly to mvPLAs, mvTANTs have regular structures with...