A three-step algorithm is presented for discrete gate sizing problem of delay/area optimization under double-sided timing constraints. The problem is rst formulated as a linear program. The solution to the linear program is then mapped onto a permissible set. Using this permissible set, the gate sizes are adjusted to satisfy the delay lower and upper bounds simultaneously.

In this work, the electrical performance of a novel reprogrammable FDSOI device with dual-doping at source/drain and only two top gates is investigated through advanced 3D TCAD simulations. The static dynamic operations are evaluated compared those traditional Schottky barrier RFETs standard 28 nm MOS transistors under manufacturable geometries.

We demonstrate a quantum phase flip gate between two QDs that resonantly couple to plasmonic double-bar resonators with asymmetric coupling strengths. Large coupling strengths can be achieved due to the deep subwavelength mode volumes of the optical modes in plasmonic double-bar resonators. High fidelity (~98%) and high success probability of the phase gate operation have been obtained when the...