Modeling and model transformations tools are maturing and are being used in larger and more complex projects. The advantage of a modeling environment and its transformation tools cannot be easily exploited by non-expert users as many subtle intricacies determine the efficiency of transformation languages and their tools. We introduce transformation use case examples that highlight such language...

Frequency synchronisation is a vital part of every inner receiver for wireless communication. In this paper we present different implementation alternatives for non data aided frequency estimation of BPSK/QPSK bursts with respect to implementation complexity and communications performance. Results with regard to different quantization levels, varying burstlengths, frequency offsets and modulati...

This session deals with modeling and simulating extra-functional system properties. The first paper presents a framework to accurately model the power and timing of hardware models without requiring a full micro-architectural simulation of the hardware module to extract signal transitions. The second paper presents a method to extend Design Space Exploration (DSE) of systems with Out-of-Order e...

In this paper we examine the multi-criteria optimization involved in scheduling for data path synthesis (DPS). We present a method to find non-dominated schedules using a combination of restricted search and heuristic scheduling techniques. Our method supports design with architectural constraints such as the total number of functional units, buses, etc. The schedules produced have been taken t...

In this paper, we propose a novel performance estimation method of software function blocks considering the effect of architecture variation, compiler optimization, and data dependent behavior. In the proposed design space exploration framework, a system behavior is specified as a composition of function blocks and the execution order of the blocks is known a priori. We run the entire applicati...

This paper presents a technique to perform partitioning and synthesis of behavioral specifications. Partitioning of the design is done under multiple constraints – interconnections and device areas of the reconfigurable architecture, and the latency of the design. The proposed Multi-FPGA partitioning technique (FMPAR) is based on the Fiduccia-Mattheyses (FM) partitioning algorithm. In order to ...

During many years, the designers just had two possibilities to design embedded systems; microprocessors and/or application specific integrated circuits. Nevertheless, a new possibility has appeared lately, the reconfigurable circuits. These systems have an important lack of tools at all design levels. Designers are then facing the difficult task of designing their target reconfigurable architec...

Motivation Related work 3D graphics acceleration SoC platform The hardware/software configurations Design space exploration Conclusion

In order to offer better design space exploration, the HLS tool must provide the designers a way to investigate diverse interconnection schemes. Little works reported on mixed bus and mux architectures. Cathedral-II [2] has a restricted bus-mux interconnection model, where interconnections inside EXU’s are mux-based and global connections are busbased. In general, mux-based interconnections are...

This tutorial discusses design space exploration and software automation based on an UML front-end. First, we review software automation tools targeted at the embedded systems domain. Following, we present an approach for the estimation of memory, performance, and energy of a given application modeled from an initial UML specification. We proceed with an analysis of the possibilities of linking...