نتایج جستجو برای: design new adder
تعداد نتایج: 2645988 فیلتر نتایج به سال:
The scaling of nanometer technology has had a major impact on the power dissipation of CMOS circuits. As transistor size decreases it has become apparent that leakage power is becoming a dominant fighting force against future technology. In this paper the importance of static power consumption on the design of new and advanced CMOS technology is explored with the investigation of leakage power ...
With the growing importance of electronic products in day-to-day life, the need for portable electronic products with low power consumption largely increases. In this paper, an area efficient high speed and low power Multiply Accumulator unit (MAC) with carry look-ahead adder (CLA) as final adder is being designed. In the same MAC architecture design in final adder stage of partial product unit...
Power consumption is a growing problem in modern digital design, and due to the quadratic relationship between power consumption and supply voltage, significant low-power research has focused on reducing the supply voltage. Adaptive gate-level voltage scaling (AGVS) is a novel design technique which dynamically adjusts the supply voltage at the gate-level to maximize energy efficiency. We propo...
Reversibility plays a fundamental role when computations with minimal energy dissipation are considered. In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, optical information processing, quantum computing and nanotechnology. This research proposes a new implementation of Binary Coded Decimal (BCD)...
In this paper a new idea is proposed to increase the speed of single precision floating point multiplier. In floating point multiplication adders are used at different places. The implementation uses efficient adders for compressing the partial products, adding the exponent and at final stage. First different adders are compared based on the delay and then multiplier is designed using the best ...
Full adder circuit is a basic building block for designing any arithmetic circuits. Due to high demands and need for low and high speed digital circuits with small silicon area scaling trends have increased tremendously. In this paper a new high speed full adder circuit is proposed with very less static and dynamic power dissipation which occupies less silicon area when compared with existing t...
Residue number system (RNS) arithmetic has a promising role for fault-tolerant high throughput superconducting single flux quantum (SFQ) circuits for digital signal processing (DSP) applications. We have designed one of the basic computational blocks used in DSP circuits, one-decimal-digit RNS adder. A new design for its main component, the single-modulus adder, has been developed. It combines ...
In this paper Modified Booth Multiplier (radix-4) implemented by various adder. Partial product generated by booth encoder is added by various adder techniques to compare the performance parameter of multiplier. Performance parameter like area, path delay, fan out, speed of multiplier. Multiplication is an important fundamental function in arithmetic logic operation. Since, multiplication domin...
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