the travelling salesmen problem (tsp) is one of the most important and famous combinational optimization problems that aim to find the shortest tour. in this problem, the salesman starts to move from an arbitrary place called depot and after visiting all nodes, finally comes back to depot. solving this problem seems hard because program statement is simple and leads this problem belonging to np...

This paper presents a method of using hardware redundancy to ease the problem of fault testing in combinational logic networks. Combinational logic networks are constructed using dual-mode logic gates. Initially, it is shown that these networks can be tested for all single stuck-at-faults using just two function-independent tests. This method is then extended to detect a large class of multiple...

It is well known that learning (i.e., indirect implications) based techniques perform very well in many instances of combinational circuit veri cation when the two circuits being veri ed have many corresponding internal equivalent points. We present some results on combinational circuit design veri cation using a powerful, and highly general learning technique called functional learning. Functi...

3D Model CD8+ T Cells In article 2200264, Wenguo Cui, Ying Wang, Shun Lu, and co-workers established a tumor-immune microenvironment (TIME) mimicking hydrogel-based microsphere co-culturing system (3D-HYGTIC). During long-term co-culturing, step-wise upregulation of key immune checkpoints with spatial heterogeneity in 3D-HYGTIC is observed, which verified patient-derived organoids TIME the muri...

Motivated by the problem of reengineering legacy digital circuits for which design information is missing or incomplete, this paper presents a new technique for representing the relationships among the internal components of a combinational circuit. This technique proves to be a powerful tool for redesign, capable of representing internal Boolean relationships in a fully or partially specified ...

1 This work study the effects of the noise spikes on the digital symbol synchronizers. In these synchronizers, we distinguish two types namely the combinational digital symbol synchronizers and the sequential digital symbol synchronizers. The combinational type has a phase detector without intern memory whereas the sequential type has a phase detector with intern memory. The objective is to stu...

Ordered Binary Decision Diagrams (OBDDs) have already proved useful in the veriication of combinational and sequential circuits. Due to limitations of the descriptive power of OBDDs several more general models of Binary Decision Diagrams have been studied. In this paper,-OBDDs-also known as Mod2OBDDs-in respect to their ability to serve as a tool for combinational veriication are considered. Be...

We develop mathematical switch-level models for static combinational CMOS networks. In contrast to other dVdihbk MOS models and theories, our models capture design principles that are special to CMOS, such as the use of transmission gates. First we study networks consisting of cascade connections of CMOS cells realizing negative functions. We then extend this model to incorporate transmission g...