This paper presents a fast Motion Estimation algorithm concept with reduction in execution time, which provides low power consumption in the design of hardware architecture. A new VLSI architecture for Integer Motion Estimation based on the Full search algorithm is proposed.This architecture uses Sum Of Absolute Difference (SAD) operation,the commonly used metric to determine the best match of ...

Most of the signal processing algorithms using floating point arithmetic, which requires millions of operations per second to be performed. For such stringent requirement design of fast, precise and efficient circuit is needed. This article present an IEEE 754 floating point unit using carry look ahead adder and radix-4 modified Booth encoder multiplier algorithm and the design is compared in t...

AbstraceIn this paper, the efficiency of a fully adiabatic logic circuit is compared with its combinational and pipelined static CMOS counterparts. The performance of each circuit is studied in terms of the maximum frequency of operation, the minimum voltage of operation, the circuit energy consumption, and the switching noise generated by the circuit. An 8-bit carry look-ahead adder is designe...

A complex digital circuit comprises of adder as a basic unit. The performance of the circuit depends on the design of this basic adder unit. The speed of operation of a circuit is one of the important performance criteria of many digital circuits which ultimately depends on the delay of the basic adder unit. Many research works have been devoted in improving the delay of the adder circuit. In t...

Inaccurate computing is found to be a high-speed, low-power and energy-efficient alternative accurate for error-tolerant applications. In this context, paper analyzes the usefulness of inaccurate digital image processing application, viz. blending, which has been less explored. We analyze use addition blending used in applications such as photo editing computer graphics. For experimentation, we...

The authors report a 0.7V Manchester carry look-ahead circuit using partially depleted (PD) SOI CMOS dynamic threshold (DTMOS) techniques for low-voltage CMOS VLSI systems. Using an asymmetrical dynamic threshold pass-transistor technique with the PD-SOI DTMOS dynamic logic circuit, this 0.7V PD-SOI DTMOS Manchester carry look-ahead circuit has an improvement of 30% in propagation delay time co...

A common technique employed for preventing a side channel analysis is boolean masking. However, the application of this scheme is not so straightforward when it comes to block ciphers based on AdditionRotation-Xor structure. In order to address this issue, since 2000, scholars have investigated schemes for converting Arithmetic to Boolean (AtoB) masking and Boolean to Arithmetic (BtoA) masking ...

Bootstrapping is a technique that was introduced by Gentry in 2009. It based on reencryption which allows an encryption scheme to perform unlimited number of processing encrypted data. bottleneck the practicability these schemes because multiplication operations are costly complexity. This complexity reduced TFHE bootstrapping result two-bit logic gate thirteen milliseconds using Fast Fourier T...

Low Power circuits play a significant role in designing large-scale devices with high energy and power consumption. Adiabatic are one such energy-saving that utilize reversible power. Several methodologies used previously infer the use of CMOS for reducing dissipation logic circuits. However, hardly manage maintaining their performance when it comes to fast switching networks. technology is emp...