The 41st IEEE VLSI Test Symposium (VTS) was held in San Diego, CA, USA, on 24–26 April 2023. This venue the first in-person one since COVID-19 pandemic. VTS is of premier conferences focusing test, reliability, and security challenges circuits. Following same trend as prior years, arranged three days captured a set research innovative practice (IP) sessions, keynotes, panels, embedded tutorials...

The articles in this issue are divided into two groups: 1) the first group comprises selected from 40th IEEE VLSI Test Symposium 2022 and 2) second consists of general interest articles.

Using a recently proposed VLSI algorithm for 2-D discrete sine transform (DST) an efficient VLSI architecture is proposed. This VLSI architecture has a modular and regular hardware structure and can compute in parallel thus resulting in high speed performances. The proposed architecture has been obtained by mapping the VLSI algorithm into two linear systolic arrays and combining them into a sin...