This paper presents a design CAD tool for automated of digital CMOS VLSI circuits. In order to fit the circuit performance into desired specifications, multi-objective optimization approach based on genetic algorithms (GA) is proposed and transistor sizes are calculated analytical equations describing behavior circuit. The algorithm developed in MATLAB designed verified using HSPICE simulations...

This paper presents low-power versions of two circuits often used in analog VLSI models of neural systems. The circuits model the spiking behavior of the axon hillock and the pulse propagation of axons.

The sum-product algorithm (belief/probability propagation) can be naturally mapped into analog transistor circuits. These circuits enable the construction of analog-VLSI decoders for turbo codes, low-density parity-check codes, and similar codes.

of the Dissertation Statistical Analysis and Optimization for Timing and Power of VLSI Circuits

This paper proposes a time-domain analog calculations model based on pulse-width modulation (PWM) approach for neural network including weighted-sum or multiply-and-accumulate calculation and rectified-linear unit operation. We also propose very-large-scale integration (VLSI) circuits to implement the proposed model. Unlike conventional voltage current mode circuits, our use transient operation...

Digital VLSI circuits are usually classi ed into synchronous and asynchronous circuits Synchronous circuits are generally controlled by global synchronization signals provided by a clock Asynchronous circuits on the other hand do not use such global synchroniza tion signals Between these extremes there are various hybrids Digital circuits in today s commercial products are almost exclusively sy...