The phase noise in an ultra low-power and low-voltage CMOS voltage controlled oscillator (VCO) has been measured and modelled for supply voltage VDD from 1.8 V down to 80 mV with various body bias voltages V B ~ The VCO is a fully integrated ring oscillator designed in a 0.18pm CMOS technology. In this design, the frequency can be controlled by VBp The effects of scaling VDD together with the e...

This paper investigates the optimization of sleep mode energy consumption for ultra-low Vdd CMOS circuits, which is motivated by our findings that minimization of sleep mode energy holds great potential for reducing total energy consumption. We propose a unique approach of using a power gating switch (PGS) in ultra-low Vdd regimes. Unlike the conventional manner of using PGSs, our optimization ...

Local self-governments cannot be defined as entities against the state, nor do they merely assist in executing central will. The significance of local lies their role division and balancing powers. In light principle subsidiarity, need for autonomy through decentralisation necessarily leads to bodies state being marginalised these matters, a sense, latter lose ability solve issues raised within...

INTRODUCTION The complexity of the nasal tip structures and the impact of surgical maneuvers make the prediction of the final outcome very difficult. Therefore, no single technique is enough to correct the several anatomical presentations, and adequate preoperative planning represents the basis of rhinoplasty. OBJECTIVE To present results of rhinoplasty, through the gradual surgical approach ...

In this paper, modular neural network (MNN) inversion has been applied for the parameters approximation of the gravity anomaly causative target. The trained neural network is used for estimating the amplitude coefficient and depths to the top and bottom of a finite vertical cylinder source. The results of the applied neural network method are compared with the results of the least-squares stand...

RC Relaxation Oscillators (RxO) are attractive for integrated clock sources compared to LC and ring oscillators (RO), as LC oscillators pose integration challenges and RO designs have limited voltage and temperature (V-T) stability. RxOs generate a clock whose time period (TP) depends only on the timing resistor (R) and capacitor (C). Ideally, TP is independent of V-T; however, most RxOs use a ...

Vdd Vdd Vdd A floating-gate pseudo-differential transconductor is presented, in which the differential input signal is allowed to have a dc offset. Normally such an offset would render a normal CMOS differential pair useless. The circuit "VX v y " inherently removes any dc offset from the floating gates lout(-) lO"I(+) by feedback mechanisms involving Fowler-Nordheim electron tunneling and hot-...

The dual supply voltage (dual-VDD) scheme reduces the active power consumption without performance degradation by using two power supply rails. However, an increase in the delay due to the scaled-down supply voltage has made assigning the lower supply voltage (VDDL) more difficult in the conventional dual-VDD scheme. We propose a technique for the dual-VDD scheme employing the Active Body-biasi...

We describe circuit techniques for a Flash memory which operates with a VDD of 1.5 V. For the interface between the peripheral circuits and the memory core circuits, two types of level shifter circuits are proposed which convert a VDD level signal into the high voltage signals needed for high performance. In order to improve the read performance at a low VDD , a new self-bias bitline voltage se...