In deep submicron era, wire delay is no longer negligible and is becoming a dominant factor of the system performance. To cope with the increasing wire delay, several state-of-the-art architectural synthesis flows have been proposed for the distributed register architectures by enabling on-chip multicycle communication. In this article, we present a new performance-driven criticality-aware synt...

The Princeton University Behavioral Synthesis System (PUBSS) is a high-level synthesis system targeted to control-dominated machines. PUBSS accepts a VHDL subset, in which the design can be described as multiple communicating processes plus registers, and generates a register-transfer implementation. This paper describes the compiler with emphasis on the automaton-based algorithms which allow e...

This paper presents an HMM-driven hybrid speech synthesis approach in which unit selection concatenative synthesis is used to improve the quality of the statistical system using a Local Minimum Generation Error (LMGE) during the synthesis stage. The idea behind this approach is to combine the robustness due to HMMs with the naturalness of concatenated units. Unlike the conventional hybrid appro...

for the first time lactic acid was applied as an efficient and green catalyst for the one-pot three-component synthesis of amidoalkyl naphthols via the condensation between arylaldehydes, 2-naphthol and amides or urea under thermal solvent-free conditions in good to excellent yields. we have demonestrated a mild and efficient eco-friendly tandem synthesis of amidoalkyl naphthols using lactic ac...

Exemplar-based texture synthesis is the process of generating, from an input sample, new texture images of arbitrary size and which are perceptually equivalent to the sample. The two main approaches are statisticsbased methods and patch re-arrangement methods. In the first class, a texture is characterized by a statistical signature; then, a random sampling conditioned to this signature produce...

The recent emerging of commercial high-level synthesis tools raises the question of specifying IPs at the algorithmic, or behavioral, level. High-level synthesis allows fast exploration of various architectural solutions from a single behavioral description. While flexibility of currently used soft IPs is limited to optimizing the logic synthesis flow, behavioral IPs introduce architectural fle...

Classical strategies in design for testability are applied at the gate-level, after the RT-logic synthesis process. New techniques covering test and synthesis (Test Synthesis) [1] are appearing but their application is mainly oriented to gate level (commercial tools such as Synopsys). On the other hand, most high-level synthesis tools do not take into account the testability of the final archit...

This work has attempted to exploit information sharing to improve the results of Adaptive Simulated Annealing 1] as an optimization algorithm of the high-level synthesis of testable data paths. We have used Messengers 3] as a coordination tool to run several parallel instances of the annealing algorithm on the same design with diierent probability arrays for the perturbations. When all these in...

In this paper we discuss possible extensions to the Speech Synthesis Markup Language (SSML) to facilitate the generation of synthetic expressive speech. The proposed extensions are hierarchical in nature, allowing specification in terms of physical parameters such as instantaneous pitch, higher-level parameters such as ToBI labels, or abstract concepts such as emotions. Low-level tags tend to c...