Instability of SRAM memory cells derived from the process variation and lowered supply voltage has recently been posing significant design challenges for low power SoCs. This paper presents a boosted word line voltage scheme, where an active bodybiasing controlled boost transistor generates a pulsed word line voltage by capacitive coupling only when accessed. Simulation results have shown that ...

Previous studies on the measurement of learning-by-doing emphasize the importance of accounting for multi-vintage effects having an impact on firms’ production costs through economies of scope. This study shows that accounting for cannibalization effects on the demand side is equally important for the adequate measurement of learning. Since multi-vintage firms anticipate the demand-side canniba...

This paper presents all simple (i.e., not linked) static fault models that have been shown to exist for Random Access Memories (RAMs), and shows that none of the current industrial march tests has the capability to detect all these faults. It therefore introduces a new test (March SS), with a test length of 22n, that detects all realistic simple static faults in RAMs.

Memories based on charge storage principle are used since many decades. The greater speed and higher density of memory chips are now achieved at lower costs. However, speed and size are gradually approaching the physical limits. Newer memory concepts are therefore being explored. This paper presents a discussion on different random access memories based on new concepts. An overview of emerging ...

In recent years studying the content of the World Wide Web became a very important yet rather difficult task. Fast resource searching engines need to explore the Internet and index its whole structure while still being profitable i.e. maintaining low machine's resource consumption that implies lower costs. In order to achieve this task a new structure was introduced, a web graph. Since the Inte...

Web archives, query and proxy logs, and so on, can all be very large and highly repetitive; and are accessed only sporadically and partially, rather than continually and holistically. This type of data is ideal for compression-based archiving, provided that random-access to small fragments of the original data can be achieved without needing to decompress everything. The recent RLZ (relative Le...

This paper explores power consumption for destructive-read embedded DRAM. Destructive-read DRAM is based on conventional DRAM design, but with sense amplifiers optimized for lower latency. This speed increase is achieved by not conserving the content of the DRAM cell after a read operation. Random access time to DRAM was reduced from 6 ns to 3 ns in a prototype made by Hwang et. al. A write-bac...

We propose an efficient hybrid automatic repeat request (HARQ) method that simultaneously achieves packet combining and resolution of the collisions random access identifiers (RAIDs) during retransmission in a non-orthogonal multiple (NOMA)-based system. Here, RAID functions as separator for received packets use same channel NOMA. An example this is scrambling code used 4G 5G systems. Since use...