A novel linear tunable transconductor based on a combination of linearization techniques is presented. The input signal is transferred to the – conversion element by means of a high-speed feedback loop. Then, the linear – conversion is accomplished using quasi-floating-gate MOS transistors biased in the triode region. Finally, the absence of current mirrors in the signal path provides low sensi...

In this work, we explore the gate oxide thickness influence on the Gate Induced Floating Body effect (GIFBE). This study was performed through two-dimensional numerical simulations and electrical measurements. The available devices are from 130nm and 65nm Silicon-On-Insulator (SOI) MOSFET technologies. The GIFBE and threshold voltage are evaluated as function of the gate oxide thickness reducti...

This paper proposes a new non-volatile semiconductor memory which features a suspended gate integrated with silicon nanocrystals dots as a floating gate and the MOSFET as a readout. Performing three-dimensional finite element simulations combined with an analytical plate-capacitor model, we clarify the pull-in/pull-out operation of the suspended gate. We also show the dependence of the hysteres...

This work presents a two-stage operational transconductance amplifier suitable for sub-1 V operation. characteristic is achieved thanks to the adoption of bulk-driven non-tailed differential pair. Local positive feedback exploited boost equivalent first stage and quasi-floating gate approach enables class AB operation second stage. Implemented in standard 180 nm CMOS technology supplied at 0.6 ...

This paper reviews differential implementations of threshold logic gates, detailing two classes of solutions: capacitive (floating gate and switched capacitor), and conductance/current.

In this paper we promote the Ultra Low Voltage (ULV) NAND gate to replace either partly or entirely the encryption block of a design to withstand power analysis attack. Keywords—Differential Power Analysis (DPA), Low Voltage (LV), Ultra Low Voltage (ULV), Floating-Gate (FG) and supply current analysis.

The minimum supply voltage in low-voltage circuits can be defined as Vsup,min = 2(Vgs+Vsat) [1]. Low-voltage circuits are able to operate on a supply voltage of two stacked gate-source voltages and two saturation voltages. Differential amplifiers are biased with a transistor feeding a differential pair, where the current level is set by the bias transistor. The minimum input voltage in a NMOS i...

We present a new type of pFET synapse; by degenerating the source, the oxide currents provide stabilizing feedback to the oating gate and to the drain. We present experimental measurements from a oating-gate synapse that simultaniously computes four-quadrant products of its input and weight values, and computes a four-quadrant correlation, typical of hebbian and backpropagation learning rules, ...