Macroscopic Na currents were recorded from N18 neuroblastoma cells by the whole-cell voltage-clamp technique. Inactivation of the Na currents was removed by intracellular application of proteolytic enzymes, trypsin, alpha-chymotrypsin, papain, or ficin, or bath application of N-bromoacetamide. Unlike what has been reported in squid giant axons and frog skeletal muscle fibers, these treatments o...

Macroscopic Na currents were recorded from N 18 neuroblastoma cells by the whole-cell voltage-clamp technique . Inactivation of the Na currents was removed by intracellular application of proteolytic enzymes, trypsin, a-chymotrypsin, papain, or ficin, or bath application of N-bromoacetamide . Unlike what has been reported in squid giant axons and frog skeletal muscle fibers, these treatments of...

We have investigated effects of neuronal differentiation on hormone-induced Ca2+ entry. Fura-2 fluorescence measurements of undifferentiated SH-SY5Y neuroblastoma cells, stimulated with methacholine, revealed the presence of voltage-operated Ca2+-permeable, Mn2+-impermeable entry pathways, and at least two voltage-independent Ca2+- and Mn2+-permeable entry pathways, all of which apparently cont...

This study investigated whether the mechanism of action of levetiracetam (LEV) is related to effects on neuronal voltage-gated Na+ or T-type Ca2+currents. Rat neocortical neurones in culture were subjected to the whole-cell mode of voltage clamping under experimental conditions designed to study voltage-gated Na+ current. Additionally, visually identified pyramidal neurones in the CA1 area of r...

A 3–8 GHz delay-locked loop (DLL) with cycle jitter calibration is presented. To lower the operation frequency of a voltage-controlled delay line (VCDL), this DLL adopts the dividers, an edge combiner, and the multiple VCDLs. A duty cycle correction circuit is presented to maintain the output duty cycle of 50%. This DLL has been fabricated in 90-nm CMOS process. The measured peak-to-peak jitter...

The present work aims at the design of 3C-SiC Double Implanted Metal Oxide Semiconductor Field Effect Transistor (DIMOSFET) with Gaussian doping profile in drift region for high breakdown voltages. By varying the device height ‘h’, function constant m and peak concentration N0, analysis has been done for an optimum profile for high breakdown voltage. With Gaussian profile peak concentration N0 ...

We present current noise measurements in a long diffusive superconductor-normal-metal-superconductor junction in the low voltage regime, in which transport can be partially described in terms of coherent multiple Andreev reflections. We show that, when decreasing voltage, the current noise exhibits a strong divergence together with a broad peak. We ascribe this peak to the mixing between the ac...

This paper presents a 90 nm CMOS Σ∆ A/D modulator operating with a supply voltage of 0.2V, well below the threshold voltage of the transistors. The modulator is an open-loop first-order architecture based on a frequencymodulated intermediate signal, generated in a ring voltagecontrolled oscillator. The linearity of the modulator is greatly improved by the adoption of a so-called soft-rail in th...

This paper presents, linear peak current mode controller for the control of DC/DC buck converter is designed and analyzed. Dynamic equations describing the buck converter are derived and linear peak current mode controller is designed. The buck converter, the voltage mode and current mode controller are modeled and are evaluated by computer simulations. The proposed technique has the advantages...

An integrated 10-Gb/s clock and data recovery circuit incorporates a LC-tank voltage-controlled oscillator, a half-rate binary phase detector and charge pump. On the basis of R.C.Walker's second-order model, and in accordance with jitter tolerance and jitter transfer, the minimum stability factor are derived in a view to determine the value of Cz and Rz finally. After the circuit design is acco...