As the size of large-scale computer systems increases, theirmean-time-between-failures are becoming significantly shorter than the execution time of many current scientific applications. Fault-tolerant parallel algorithm (FTPA) is an application-level fault-tolerant approach that can achieve fast self-recovery by parallel recomputing. The method of parallelizing the loops has been used to desig...

Analytical solution for the problem of a surface-breaking long strike-slip fault in an elastic layer overlying an elastic half-space is well known. The purpose of this note is to obtain the corresponding solution for a blind fault. Since the solution is valid for arbitrary values of the fault-depth and the dip angle, the effects of these two important fault parameters can be studied numerically...

The theory behind fault tolerant multi-level Monte Carlo (FT-MLMC) methods was recently developed and tested. These tests were made without a real fault tolerant implementation. We implemented an MPI-parallelized fault tolerant MLMC version of an existing parallel MLMC code (ALSVID-UQ). It is based on the User Level Failure Mitigation, a fault tolerant extension of MPI. We confirm our FT-MLMC t...

Accurate and robust fault location algorithm for parallel lines compensated with one three-phase bank of series capacitors in each the line is presented. The algorithm is categorized as one-end fundamental frequency based technique which offsets the series compensation effect and the reactance effect resulting from the remote end infeed under resistive faults as well as takes the countermeasure...

In signal processing and communication systems digital filters are widely used. The reliability of those systems is critical in some cases, and fault tolerant filter implementations are needed. Many techniques that exploit the filters' structure and properties to achieve fault tolerance have been proposed over the years. As technology scales, it enables more complex systems that incorporat...

1 Authors are listed in alphabetical order 2 Mary M. Eshaghian-Wilner is a Patent Agent at the Electronics Practice Group of Foley & Lardner, LLP. She is also an Adjunct Professor of Electrical Engineering at the University of California, Los Angeles. Abstract In this paper, we present a number of parallel and fault-tolerant routing schemes for a set of nanoscale spin-wave architectures. The ar...

Limiting the extent of error propagation when faults occur and localizing the subsequent error recovery are common concerns in the design of fault tolerant parallel processing systems. Both activities are made easier if the designer associates fault tolerance mechanisms with the underlying atomic actions of the system. With this in mind, this paper has investigated two methods for the identific...

Limiting the extent of error propagation when faults occur and localizing the subsequent error recovery are common concerns in the design of fault tolerant parallel processing systems. Both activities are made easier if the designer associates fault tolerance mechanisms with the underlying atomic actions of the system. With this in mind, this paper has investigated two methods for the identific...