A gain boosting method without noise-figure degradation by optimizing interstage matching in a cascode low-noise amplifier (LNA) with emitter-degeneration inductor is demonstrated at 5.2 GHz using 2m GaInP/GaAs HBT technology. A low-pass LC matching network is inserted in the interstage of a conventional cascode LNA with emitter-degeneration-inductor to enhance the gain with the same current co...

Problem statement: The Low Noise Amplifier (LNA) is a core block of an Ultra Wide Band (UWB) receiver since it amplifies a very weak signal received at the antenna to acceptable levels while introducing less self-generated noise and distortions. The LNA design poses a unique challenge as it requires simultaneous optimization of various performance parameters like power gain, input matching, noi...

A micro-power RFIC front-end, a low-noise amplifier (LNA) combined with a voltage controlled oscillator (VCO), has been designed using FinFET BSIMSOI model, which is developed for all FinFET transistors fabricated at the SPAWAR system center. The LNA power consumption is 26 μW at 0.5V supply and the VCO power consumption is 29 μW at 0.5V supply.

In this paper, an ultra-wideband (UWB) common gate low-noise amplifier (LNA) with -boosted and noise-cancelling techniques is presented. In this scheme we utilize gm-boosted stage for cancelling the noise of matching device. The bandwidth extension and flat gain are achieved by using of series and shunt peaking techniques. Simulated in .13 um Cmos technology, the proposed LNA achieved 2.38-3.4d...

A cascode CMOS low noise amplifier (LNA) is presented along with the used design methodology and measurement results. The LNA works at 2.4 GHz with 14.5 dB voltage gain and 2.8 dB simulated noise figure (NF). Powered from a 1.8 V supply, the core measured current consumption is 2.76 mA. An output buffer was designed to match a 50 Ω load and its current consumption is 5.5 mA. The technology used...

There is a strong interest in the Submillimeter community to increase the IF bandwidth of SIS receivers in order to facilitate extra-galactic astronomy. However, increasing the IF bandwidth generally also means increasing the IF operating frequency of the mixer, because it is very difficult to achieve a good IF impedance match to a low noise amplifier (LNA) for more than an octave bandwidth. Co...

In this paper, a 5.2GHz low noise amplifier in 0.25um CMOS utilizing inter-stage matching is designed. Two realizations for a low value of inductor within the LNA are implemented. The measurement results are 7dB gain and 5.86dB noise figure is achieved for the on-chip inductor realization, and 8.3dB gain and 5.74dB noise figure is achieved for the bond-wire inductor realization.

a novel low noise trans-impedance amplifier is proposed using low cost 0.18 µm cmos technology. a resistive-capacitive feedback is used to extend the bandwidth of the amplifier. as the structure is inductor less, it is suitable for low cost integrated optical interconnects. in this paper improved particle swarm optimization have applied to determine optimal trans-resistance and noise of propose...

This paper presents a multi-band low-noise amplifier (LNA) in the 45-nm CMOS silicon-on-insulator (SOI) process. The LNA consists of three stages, with differential cascode as core structure. first stage is mainly responsible for input matching to ensure favourable noise characteristics and bandwidth, while subsequent stages increase gain. Moreover, utilizes baluns input/output interstage imped...

The presented paper includes the design and implementation of a 65 nm CMOS low-noise amplifier (LNA) based on inductive source degeneration. The amplifier is realized with an active balun enabling a single-ended input which is an important requirement for low-cost system on chip implementations. The LNA has a tunable bandpass characteristic from 4.7 GHz up to 5.6 GHz and a continuously tunable ...