Fatty acid (FA) uniport via mitochondrial uncoupling protein (UcP) was detected fluorometrically with PBFI, potassium-binding benzofuran phthalate and SPQ, 6-methoxy-N-(3-sulfopropyl)-quinolinium, indicating K+ and H+, respectively. The FA structural patterns required for FA flip-flop, UcP-mediated FA uniport, activation of UcP-mediated H+ transport in proteoliposomes, and inhibition of UcP-med...

A UART (Universal Asynchronous Receiver and Transmitter) is a device allowing the reception and transmission of information, in a serial and asynchronous way. This project focuses on the implementation of UART with status register using multi bit flip-flop and comparing it with UART with status register using single bit flip-flops. During the reception of data, status register indicates parity ...

A method to generate an all-optical flip-flop is proposed and experimentally demonstrated based on dynamic Brillouin gratings (DBGs) in polarization maintaining fibers. In a fiber with sufficiently uniform birefringence, this flip-flop can provide extremely long storage times and ultra-wide bandwidth. The experimental results demonstrate an all-optical flip-flop operation using phase-modulated ...

Use of a standard non-rad-hard digital cell library in the rad-hard design can be cost-effective solution for space applications. In this paper we demonstrate how flip-flop, as one most vulnerable cells, converted into flip-flop without modifying its internal structure. We present five variants Triple Modular Redundancy (TMR) flip-flop: baseline TMR latch-based True-Single Phase Clock (TSPC) sc...

We demonstrate that 80 Gb/s data-packets can be all-optically switched into two different ports employing an optical wavelength converter controlled by a monolithically integrated optical flip-flop memory. The optical wavelength converter consists of a semiconductor optical amplifier and an optical filter. The integrated optical flip-flop exhibits single-mode operation, has 35 dB contrast ratio...

A reduced clock-swing flip-flop (RCSFF) is proposed, which is composed of a reduced swing clock driver and a special flip-flop which embodies the leak current cutoff mechanism. The RCSFF can reduce the clock system power of a VLSI down to one-third compared to the conventional flip-flop. This power improvement is achieved through the reduced clock swing down to 1 V. The area and the delay of th...

This article presents a research work on the design and synthesis of sequential circuits and flip-flops that are available in digital arena; and describes a new synthesis design of reversible counter that is optimized in terms of quantum cost, delay and garbage outputs compared to the existing designs. We proposed a new model of reversible T flip-flop in designing reversible counter. Keywords—F...

Glycerophospholipid flip-flop across biogenic membranes such as the endoplasmic reticulum (ER) is a fundamental feature of membrane biogenesis. Flip-flop requires the activity of specific membrane proteins called flippases. These proteins have yet to be identified in biogenic membranes and the molecular basis of their action is unknown. It is generally believed that flippase-facilitated glycero...

A low power pulse triggered flip-flop with signal feed through scheme using Conditional Pulse Enhancement technique is presented in this paper. The proposed design adopts a modified True Single Phase Clock Latch structure and employs a signal feed through scheme to enhance the delay. The long discharging path problem in conventional explicit type pulse triggered flip flops are successfully solv...

The pertinent choice of flip-flop topologies is an essential importance in the design of VLSI integrated circuits for high speed and high performance CMOS circuits. Understanding the suitability of flipflops and selecting the best topology for a given application is an important issueto fulfill the need of the design to satisfy low power and high performance circuit. This paper presents a wides...