Designing VLSI digital circuits is challenging tasks because of testing the concerning design time. The reliability and productivity integrated are primarily affected by defects in manufacturing process or systems. If more systems, which leads fault tolerant systems necessary to overcome faults circuits. In this research article, an asynchronous based effective transient injection (TFI) system ...

Consistency among processors is vital for fault-tolerant multiprocessors. This report describes modular communication interprocessor interface units which implement distributed consistency schemes such that failures within a single processor module cannot affect the consistency of data transferred among the remaining processors. Furthermore, one scheme provides concurrent and consistent self-di...

This paper revises and introduces to the field of reconfigurable computer systems, some traditional techniques used in the fields of fault-tolerance and testing of digital circuits. The target area is that of on-board spacecraft electronics, as this class of application is a good candidate for the use of reconfigurable computing technology. Fault tolerant strategies are used in order for the sy...

In this paper we propose a FPGA-based system to speed-up Fault Injection campaigns for the evaluation of the fault-tolerant capabilities of VLSI circuits. An environment is described, relying on FPGA-based emulation of the circuit. Suitable techniques are described, allowing emulating the effects of faults and to observe faulty behavior. The proposed approach allows combining the speed of hardw...

We give a graph-theoretical model for off-line fault-tolerant scheduling of dataflow algorithms onto multiprocessor architectures with distributed memory. Our framework allows the modeling of both processor and communication channel failures of the “fail silent” type (either transient or permanent), and failure masking is achieved by replicating operations and data communications. We show that,...

Abstract The intrinsic high parallelism and entanglement characteristics of quantum computing have made image processing techniques a focus great interest. One the most widely used in is segmentation, which one their basic forms can be carried out using thresholding algorithms. In this paper, fault-tolerant dual-threshold algorithm has been proposed. This built only Clifford+ T gates for compat...

An approach is presented to create molecular electronics systems by introducing a multi-valued programmable logic (MVPL) block to model the characteristics recently observed experimentally in certain molecular structures to achieve circuit robustness on a molecular substrate. We show that— given the experimentally observed characteristics of certain types of molecular electronics substrates—we ...

Soft errors are an important issue for circuit reliability. To mitigate their effects on the system functionality, different techniques are used. In many cases Error Correcting Codes (ECC) are used to protect circuits. Single Error Correction (SEC) codes are commonly used in memories and can effectively remove errors as long as there is only one error per word. Soft errors however may also affe...

The Clifford+T library provides robust and fault-tolerant realizations for quantum computations. Consequently, (logic) synthesis of Clifford+T quantum circuits became an important research problem. However, previously proposed solutions are either only applicable to very small quantum systems or lead to circuits that are far from being optimal— mainly caused by a local, i.e. column-wise, consid...