In this paper, a new voltage controlled first order all-pass filter is presented. The proposed circuit employs a single differential voltage dual-X second generation current conveyor (DV-DXCCII) and a grounded capacitor only. The proposed all-pass filter provides both inverting and non inverting voltage-mode outputs from the same configuration simultaneously without any matching condition. Non-...

This paper presents an excitatory CMOS power consumption and circuit size, which is ideal for integrator is built using operational amplifier. This circuitry is realized in TSMC 0.18μm CMOS Technology. Switched Capacitor (SC) integrator circuit The SC integrator correlated double

A new analytical modelling approach to evaluate the impact of single event transients (SETs) on CMOS circuits has been developed. The model allows evaluation of transient pulse amplitude and width (duration) at the logic level, without the need to run circuit level (Spice-like) simulations. The SET mechanism in MOS circuits is normally investigated by Spice-like circuit simulation. The problem ...

The strong interaction between Electronic Design Automation (EDA) tools and Complementary Metal-Oxide Semiconductor (CMOS) technology contributed substantially to the advancement of modern digital electronics. The continuous downscaling of CMOS Field Effect Transistor (FET) dimensions enabled the semiconductor industry to fabricate digital systems with higher circuit density at reduced costs. T...

This paper describes the design process used in developing a Stream Memory Controller (SMC)*. The SMC can reorder processor-memory accesses dynamically to increase the effective memory bandwidth for vector operations. A 132-pin ASIC was implemented in static CMOS using a 0.75μm process and has been tested at 36MHz. * This work was sponsored by the National Science Foundation under Grant MIP-930...

Recently we have proposed Boolean single-fluxquantum (BSFQ) circuits, which like CMOS circuits directly support Boolean primitives, and do not require local synchronization for their elementary cells as well as for their combinational cells. However, only the cell-level timing description of the BSFQ circuits was considered, which did not specify their global timing strategy in a system-level d...

To ability to control the transport of individual electrons in Single Electron Tunneling (SET) based circuits creates the conditions for Single Electron Encoded Logic (SEEL). This paper investigates the implementation of SEEL memory elements. After introduction of the threshold gate and buffer/inverter, which serve as basic circuit blocks, SEEL implementations of the RS-latch, D-latch and posit...

In Analog circuit design field, current reference circuit is mostly used for constant current supply to the circuits, so that their function runs properly. This work gives a circuit that operates with minimum operating voltage and current, CMOS current generator circuit and presents its performance with circuit simulation in 180nm UMC CMOS technology. The designed circuit has four sub parts sta...

CMOS was developed as a digitally friendly process. Now, thanks to high levels of system integration and the emergence of SOC (system-on-chip) design, CMOS has also become the process of choice for mixed-signal applications. However, cutting-edge CMOS has limitations in these applications. Process restrictions, inaccurate simulation models, wide parametric variance, and noisy application enviro...