The flip-chip package provides the best solution that has the highest chip density in all package technologies to support the pad-limited VLSI designs. In this paper, we propose a routing algorithm for the flip-chip package. The routing algorithm can search a suitable routing path from bump pads to driver pads and route each of them. In this routing algorithm, there are four stages including Cl...

With the increased complexity of Very Large Scale Integrated (VLSI) circuits, Computer Aided Design (CAD) plays an even more important role. Top-down design methodology and layout of VLSI are reviewed. Moreover, previously published algorithms in CAD of VLSI design are outlined. In certain applications, Reed-Muller (RM) forms when implemented with AND/XOR or OR/XNOR logic have shown some attrac...

Support for version management of highly interconnected complex objects is a strong requirement for database systems supporting CAD. In this paper, we present such a version model and exemplify it by means of the VLSI design process. However, we are not only interested in the version model itself, but also in its implementation on top of an existing complex-object data model without version sup...

Simulating performance and energy consumption of embedded systems using a high-level description is a challenging task in VLSI CAD. However such simulations are needed to select the best hardware architecture and software organization for a particular application. In this paper, we present an approach for cycle-accurate hardware/software co-simulations of energy consumption in embedded systems....

Since its first release the system level language SystemC had a significant impact on various areas in VLSI-CAD. One remarkable benefit of SystemC lies in the support of abstraction levels beyond RTL. But being able to implement complex System-on-Chip (SoC) designs in SystemC raises the necessity of new techniques to support debugging, system exploration, and verification. We present an integra...

Logic partitioning is an important issue in VLSI CAD, and has been an active area of research for at least the last 25 years. Numerous approaches have been developed and many different techniques have been combined for a wide range of applications. In this paper, we examine many of the existing techniques for logic bipartitioning and present a methodology for determining the best mix of approac...

Open-ended activities such as CAD/CAM, VLSI layout and software development require consistent concurrent access and fault tolerance associated with database transactions, but their uncertain duration, uncertain developments during execution and long interactions with other concurrent activities break traditional transaction atomicity boundaries. We propose splittransaction as a new database op...

This paper explores the potential of the lazy functional programming language Haskell for the specification, synthesis and verification of digital circuits. Circuits are described using combinators that combine behaviour (allowing circuit simulation, symbolic evaluation and partial evaluation) and layout (allowing the generation of output suitable for entry into VLSI CAD tools). We call the sof...

Logic partitioning is an important issue in VLSI CAD, and has been an area of active research for at least the last 25 years. Numerous approaches have been developed and many different techniques have been combined for a wide range of applications. In this paper, we examine many of the existing techniques for logic bipartitioning and present a methodology for determining the best mix of approac...

Given a directed acyclic graph with timing constraints, the budget management problem is to assign to each vertex an incremental delay such that the total sum of these delays is maximized without violating given constraints. We propose the notion of slack sensitivity and budget gradient to demonstrate characteristics of budget management. We develop an optimal polynomial-time algorithm for the ...