In this paper we consider transistor sizing to reduce crosstalk. First, crosstalk noise dependency on wire width, wire spacing, driver and receiver sizes are discussed, and validated by experiments. Then transistor sizing for timing and noise is discussed and solved using optimization techniques. Experimental results suggest that crosstalk violations can be removed by transistor sizing with ver...

we present an improved implementation of the wagner-whitin algorithm for economic lot-sizing problems based on the planning-horizon theorem and the economic- part-period concept. the proposed method of this paper reduces the burden of the computations significantly in two different cases. we first assume there is no backlogging and inventory holding and set-up costs are fixed. the second model ...

BACKGROUND The purpose of this study was to identify factors related to the unexpected vault in V4c implantable collamer lens (ICL; STAAR Surgical) implantation. METHODS V4c ICLs were implanted in 43 eyes of 43 patients for the correction of myopia. The implanted V4c ICL sizes were determined individually with our previous V4 ICL sizing nomogram based on the sulcus-to-sulcus diameter (STS), a...

One of the most important subjects in nuclear power plants is sizing of flaws which are detected during InService Inspection (ISI), since reliability of flaw sizing is very important to estimate the life of the structure or pressure equipment. The most difficult matter for applying the flaw sizing techniques mentioned above is how to identify the flaw tip signal, especially in the case of natur...

Multiple virtual machine (VM) workloads are increasingly common, given the growth of managed enterprise application systems and consolidated virtual servers. Until now, there has been no principled approach to partitioning memory resource between multiple co-located VMs. In this paper, we develop a general framework for multi-VM heap sizing, based on the principle of utility maximization from m...

This paper reviews the development of a root mean squared error (RMS) flaw sizing criterion. The effect of using an RMS error criterion for the sizing performance of the PISC II [1-3] inspection teams is investigated. A crucial part of establishing an RMS error sizing criterion is the decomposition of the components in the RMS error into the sum of the squares of the mean error, the standard er...

In this paper, we develop a set of delay estimation models with consideration of various interconnect optimization techniques, including optimal wire-sizing (OWS), simultaneous driver and wire sizing (SDWS), and simultaneous buuer insertion/sizing and wire sizing (BISWS). These models have been tested on a wide range of parameters and shown to have about 90% accuracy on average compared with ru...

Conventional methods for optimal sizing of wires and transistors use linear RC circuit models and the Elmore delay as a measure of signal delay. If the RC circuit has a tree topology the sizing problem reduces to a convex optimization problem which can be solved using geometric programming. The tree topology restriction precludes the use of these methods in several sizing problems of signi cant...

Production planning with lot-sizing and scheduling in industries where the cleaning times depend on the sequence of the products can be modelled as a mixed integer problem. However, this problem is very hard, and even small instances cannot be solved exactly in a reasonable time. We propose a division of the whole production planning problem into its two subproblems, and to solve each them inde...

In this paper, we present a fast algorithm for continuous wire-sizing under the distributed Elmore delay model. Our algorithm GWSA-C is an extension of the GWSA algorithm (for discrete wire-sizing) in CL93a]. GWSA-C is an iterative algorithm with guaranteed convergence to optimal wire-sizing solutions. When specialized to discrete wire-sizing problems, GWSA-C is an improved implementation of GW...