نتایج جستجو برای: زیرلایه soi

تعداد نتایج: 5227  

2002
Seth Hollar Anita Flynn Sarah Bergbreiter

With the ultimate goal of creating autonomous microrobots, we have developed a new five-mask process that combines two polysilicon structural layers with 35 μm thick SOI structures and a backside substrate etch. The polysilicon layers provide 3D hinged structures, high compliance structures, and electrical wiring. The SOI structural layer yields much stronger structures and large-force actuator...

2006
Brian G. Raub William W. Chen

The Statistics of Income (SOI) Division of the Internal Revenue Service (IRS) produces data using information reported on tax returns. These administrative data are used by the Department of the Treasury, the Joint Committee on Taxation, and various Federal statistical agencies and are disseminated to the public via the World Wide Web and publications such as the SOI Bulletin. The Corporate For...

2003
A. Raman D. G. Walker

The present work considers electrothermal simulation of LDMOS devices and associated nonequilibrium effects. Simulations have been performed on three kinds of LDMOS: bulk Si, partial SOI and full SOI. Differences between equilibrium and nonequilibrium modeling approaches are examined. The extent and significance of thermal nonequilibrium is determined from phonon temperature distributions obtai...

2011
Jason J Hallman Narayan Yoganandan Dale Halloway James Rinaldi Frank A Pintar

In the literature frontal crashes typically have been classified as full, large overlap, or small overlap impacts (SOI) in accordance with the degree of frontal area involvement. These classifications implicitly refer to the degree of longitudinal structure engagement during impact. While full and large overlap impacts have received considerable attention, SOI has undergone limited analyses thr...

2010
Wei Bian Zhifeng Yan Jin He chenyue Ma Chenfei Zhang Mansun Chan

A correlation between the gated-diode R-G current and the performance degradation of SOI n-channel MOS transistor after F-N stress test has been demonstrated in this paper. Due to increase of interface traps after F-N stress test, the generation-recombination (R-G) current of the gateddiode in the SOI-MOSFET architecture increases while the performance characteristics of MOSFET transistor such ...

Journal: :Écrivains à l’écran 2019

2001
R. V. Joshi S. Kang C. T. Chuang G. Shahidi

This paper describes applications of Silicon on Insulator (SOI) technology to high performance onchip memories (e.g. SRAMs and register files etc.).The primary focuses are on the important and unique issues in SOI technology such as performance gain, history effect, power reduction, pulsewidth control and self-heating. The effects on the interconnect performance and reliability are also discuss...

Journal: :Physical review. E, Statistical, nonlinear, and soft matter physics 2001
M Ausloos K Ivanova

The southern oscillation index (SOI) is a characteristic of the El Niño phenomenon. SOI monthly averaged data is analyzed for the time interval 1866-2000. The tail of the cumulative distribution of the fluctuations of SOI signal is studied in order to characterize the amplitude scaling of the fluctuations and the occurrence of extreme events. Large fluctuations are more likely to occur than the...

2017
Yan Liu Jiebin Niu Hongjuan Wang Genquan Han Chunfu Zhang Qian Feng Jincheng Zhang Yue Hao

Well-behaved Ge quantum well (QW) p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) were fabricated on silicon-on-insulator (SOI) substrate. By optimizing the growth conditions, ultrathin fully strained Ge film was directly epitaxially grown on SOI at about 450 °C using ultra-high vacuum chemical vapor deposition. In situ Si2H6 passivation of Ge was utilized to form a high...

2000
Eric MacDonald Nur A. Touba

The proliferation of both Partially Depleted SiliconOn-Insulator (PD-SOI) technology and domino circuit styles has allowed for increases in circuit performance beyond that of scaling traditional bulk CMOS static circuits. However, interactions between dynamic circuit styles and PD-SOI complicate testing. This paper describes the issues of testing domino circuits fabricated in SOI technology and...

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