A single chip 2.4GHz low power CMOS receiver and transmitter for WPAN applications are implemented and measured. The receiver uses a low-IF architecture with a polyphase filter and transistor linearization technique to improve linearity per power, and the transmitter adopts a ROM based direct-conversion architecture for low power consumption and high integrated density. Experimental results sho...

Abstract — A 5.2 GHz 1 dB conversion gain, IP1dB= -19 dBm and IIP3= -9 dBm double quadrature Gilbert downconversion mixer with polyphase filters is demonstrated by using 0.35 m SiGe HBT technology. The image rejection ratio is better than 47 dB when LO=5.17 GHz and IF is in the range of 15 MHz to 45 MHz. The Gilbert downconverter has fourstage RC-CR IF polyphase filters for image rejection. Pol...

In this paper we present a new circuit design for a 2.4GHz CMOS direct conversion mixer incorporating adaptive offset cancellation. The basic circuit structure is that of a Gilbert cell mixer. Offsets are cancelled by dynamically varying the bias on the loads, which are designed to provide constant impedance independent of the load cancellation current. The bias control is regulated via an adap...

This work details the optimization and evaluation of a CMOS low-noise amplifier by developing new algorithm for gm/ID approach combining with modified figure merit index method. The includes on-chip matching elements (such as IC inductors) resonance at targeted frequencies. simulation results optimized LNA model showed scattering parameter S21 = 19.91 dB, noise NF 3.54 dB excellent linearity th...

In this paper, a 2.4GHz low power downconversion mixer with high linearity for direct-conversion receivers based on a standard 0.18um CMOS technology is proposed. In the circuit design, Gilbert cell architecture and Common-Gate configuration are used. A simple buffer is applied in the IF output. Simulation results show that the mixer can operate at 2.4GHz and obtain the conversion gain of 11.08...

In this work, we present a design and simulation of low power consumption down conversion Gilbert-Cell mixer, in the 1.9 GHz wireless application. The circuit is in a 65 nm – CMOS technology at a supply voltage of 1.8 V. The obtained results show a third order input intercept point (IIP3) and a Noise Figure in the order of 1.7 dBm and 3.13 dB respectively, when the conversion gain equal to 13.9...

A 2.4 GHz CMOS RF front-end using for ZigBee application is described. The front-end consists of a low noise amplifier and a down-mixer and uses a 2 MHz IF frequency. A common source with resistive feedback and an inductive degeneration are adopted for a low noise amplifier, and a 20 dB gain control step is digitally controlled. A passive mixer for low current consumption is employed. The RF fr...

In this paper, the significance of linearity for UWB front-end circuit is discussed. The effects of strong narrow band interferer on UWB signal are investigated. Wideband linearization techniques for UWB LNA are first proposed in this work. A high linearity UWB LNA is designed in TSMC 0.18μ CMOS process The simulation results show that the designed LNA exhibits very high IIP3 (6.9~13.8 dBm) whi...

Two techniques are presented in this paper for a software-defined radio (SDR) receiver robust to out-of-band interference. Voltage gain is realized at IF simultaneously with low-pass filtering to mitigate blockers and out-of-band intermodulation distortion. A 2-stage polyphase harmonic rejection (HR) mixer concept robust to gain error achieves 2-6 HR of more than 60dB for 40 samples without tri...

This paper presents a new ultra-wideband LNA which employs the complementary derivative superposition method in noise cancellation structure. A pMOS transistor in weak inversion region is employed for simultaneous second- and third-order distortion cancellation. Source-degeneration technique and two shunt inductors are added to improve the performance at high frequencies. The degeneration induc...