Kapil Juneja

[ 1 ] - High-performance and Low-power Clock Branch Sharing Pseudo-NMOS Level Converting Flip-flop

Multi-Supply voltage design using Cluster Voltage Scaling (CVS) is an effective way to reduce power consumption without performance degradation. One of the major issues in this method is performance and power overheads due to insertion of Level Converting Flip-Flops (LCFF) at the interface from low-supply to high-supply clusters to simultaneously perform latching and level conversion. In this p...