Manoranjan Pradhan
Department of Electronics and Telecommunication, Veer Surendra Sai University of Technology, India.
[ 1 ] - A novel vedic divider based crypto-hardware for nanocomputing paradigm: An extended perspective
Restoring and non-restoring divider has become widely applicability in the era of digital computing application due to its computation speed. In this paper, we have proposed the design of divider of different architecture for the computation of Vedic sutra based. The design of divider in the Vedic mode results in high computation throughput due to its replica architecture, where latency is mini...
[ 2 ] - Design of magnetic dipole based 3D integration nano-circuits for future electronics application
Nano Magnetic Logic (NML) has been attracting application in optical computing, nanodevice formation, and low power. In this paper nanoscale architecture such as the decoder, multiplexer, and comparator are implemented on perpendicular-nano magnetic logic (pNML) technology. All these architectures with the superiority of minimum complexity and minimum delay are pointed. The proposed architectur...
[ 3 ] - A novel vedic divider based crypto-hardware for nanocomputing paradigm: An extended perspective
Restoring and non-restoring divider has become widely applicability in the era of digital computing application due to its computation speed. In this paper, we have proposed the design of divider of different architecture for the computation of Vedic sutra based. The design of divider in the Vedic mode results in high computation throughput due to its replica architecture, where latency is mini...
[ 4 ] - Design of magnetic dipole based 3D integration nano-circuits for future electronics application
Nano Magnetic Logic (NML) has been attracting application in optical computing, nanodevice formation, and low power. In this paper nanoscale architecture such as the decoder, multiplexer, and comparator are implemented on perpendicular-nano magnetic logic (pNML) technology. All these architectures with the superiority of minimum complexity and minimum delay are pointed. The proposed architectur...
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