Trupa Sarkar
ECE, National Institute of technology, Agartala
[ 1 ] - Test Power Reduction by Simultaneous Don’t Care Filling and Ordering of Test Patterns Considering Pattern Dependency
Estimating and minimizing the maximum power dissipation during testing is an important task in VLSI circuit realization since the power value affects the reliability of the circuits. Therefore during testing a methodology should be adopted to minimize power consumption. Test patterns generated with –D 1 option of ATALANTA contains don’t care bits (x bits). By suitable filling of don’t cares can...
[ 2 ] - Look up Table Based Low Power Analog Circuit Testing
In this paper, a method of low power analog testing is proposed. In spite of having Oscillation Based Built in Self-Test methodology (OBIST), a look up table based (LUT) low power testing approach has been proposed to find out the faulty circuit and also to sort out the particular fault location in the circuit. In this paper an operational amplifier, which is the basic building block in the ana...
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