Investigation and simulation of the effect of Substrate Doping on the Switching Delay of 22nm Double-Insulating UTBB SOI MOSFET

In this paper, for the first time, the effect of the substrate doping of 22nm double-insulating UTBB silicon-on-insulator device on the switching performance and turn-on delay of the transistor is investigated. In UTBB devices, the substrate voltage is varied from positive to zero then negative voltages to trade-off transistor speed against the leakage current. Various circuit design procedures are followed to accomplish dynamic frequency-voltage scaling (DVFS). The switching delay from positive to negative substrate voltages are often considered negligible in comparison with typical 1 mS delay of the switching circuit itself. We show that the transistor switching delay is completely comparable with that of the switching circuit at the substrate doping of 1015 cm-3. Indeed, at this doping, the transistor delay is 1 mS and as the substrate doping increases to 1018 cm-3, the delay reduces to 0.03 nS. Therefore, the substrate doping directly influences the switching delay and output voltage settling time of the transistor and if ignored, will result in increased noise and degraded jitter performance.