Device Queues Input

Fluid queues with input controlled by exponential timer

A Throughput-Enhanced Parallel Scheduling Algorithm for the MIQ Switch with a Moderate Number of Queues

Introduction: In order to overcome the throughput limit of the single input-queued (SIQ) packet switch, a number of bu ering strategies have been put forward in recent years. Among them, the virtual output-queued (VOQ) switch is receiving considerable attention, since it can yield 100% throughput depending on the scheduling algorithm employed. As a special case of the multiple input-queued (MIQ...

Routing in Networks with Random Topologies

AI IS’1’RAC’1’: We examine the problems of routing and server assignment in network with ranclom connectivities. In such a network the basic topology is fixed, but during each time slot ancl for each of its iw ~Jut queues, each server (node) is either connected to or disconnected from each of its input queues with some probability. I~uring each time slot a server must decide which of its connec...

Performance Analysis of Clock-Regulated Queues with Output Multiplexing in Three Different 2 x 2 Crossbar Switch Architectures

Switches in interconnection networks for highly parallel shared memory computer systems may be implemented with different internal buffer structures. For a 2×2 synchronous switch, previous studies have often assumed a switch composed of two queues, one at each output, each of which has unbounded size and may accept two inputs every clock cycle. Hardware implementations may actually use simpler ...

Performance analysis of large multicast switches with multicast virtual output queues

In multicast switches, the accommodation of multicast traffic in multiple queues per input buffer reduces the throughput degradation caused by head-of-line (HOL) blocking. Such an arrangement, called multicast virtual output queuing (MC-VOQ), is very promising in theory but can only be implemented in practice with heavy approximation. Complete avoidance of the HOL blocking problem would in fact...