Principles of Phase Locked Loops (pll)

Introduction In recent years, personal communications in high Megahertz and low Gigahertz frequency ranges are booming. Behind this achievements was the technological progress in integrated circuitry on one hand and application of frequency synthesis on the other hand. The task of the phase locked loops is to maintain coherence between input (reference) signal frequency, f i , and the respective output frequency, f , via o phase comparison. The theory is explained in many textbooks [e.g., 1, 2] and practically in all books on frequency synthesis. [3 through 10]. Here, we shall repeat, in short, all major features with some new achievements. Each PLL loop works as a feedback system shown in Fig. 1. To get more insight into the PLL properties, we shall simplify, without any loss of generality, the block diagram to that shown in Fig. 2. and introduce the Laplace transfer functions of the individual building circuits-suitable for investigation of small signal properties. Fig. 2 Simplified block diagram of the PLL with individual transfer functions Investigation of the above figure reveals that the input phase OE OE OE OE i (t) is compared with the output phase OE OE OE OE o (t) in phase detector (ring modulator, sampling circuit, etc.). the proportionality factor, K d [volt/2_ _ _ _], is called the "phase detector gain." 2 Next, v d (t) passes the loop filter, F(s) (2) where h f (t) is the time response of the loop filter. After applying v 2 (t) on the frequency control element of the voltage controlled oscillator (VCO) we get the output phase (3) the proportionality factor, K o [2_ _ _ _ Hz/volt], is the oscillator gain. Since, in most cases, K d and K o are voltage dependent the general mathematical model of a PLL is a nonl+inear differential equation. Its linearization, justified in small signal cases ("steady state" working modes), provides a good insight into the problem. where we have introduced the forward loop gain K =K d K o and the open loop gain G(s) (6) B/ Order of PLL 3 In the simplest case there are no filters both in forward and feedback paths. This phase lock loop is designated as the first order loop Generally the denominator in H(s) is of a higher order in s and we speak about PLL of the second, third, ect C/ Type of PLL The number of poles …