Automatic Design Exploration Framework for Multicores with Reconfigurable Accelerators

Despite their promising improvements in performance and power efficiency, the possibilities of reconfigurable computing in multiprocessor environments are still mainly unexplored. This paper presents a new framework for rapid testing of multicores with application-specific reconfigurable accelerators. The design exploration is a multi-step flow that performs automatic generation of fine-grained accelerators, automatic parallelization, and testing. The automatic generation of accelerators is accomplished by an in-house developed software. Automatic parallelization is performed by OSCAR (Optimally SCheduled Advanced multiprocessoR) source-to-source compiler. The testing platform is configured from 1 up to 8 cores, and each core has a private reconfigurable space to implement application-specific accelerators. We test the design process with applications from the media domain (Optical Flow, AAC encoder, MPEG2 encoder and MPEG2 decoder). The results show that the multicore configuration outputs of our design exploration framework for 8 CPUs with reconfigurable accelerators achieve a maximum speedup of 6.57x for the Optical Flow application.