A Combinatorial Approximation Algorithm for Selecting the Gate Sizes from Finite Sets in VLSI Circuits
نویسندگان
چکیده
In this paper, we consider a problem of VLSI design occurring in the routing phase. The problem is to determine the optimal size selection for the gates in a combinatorial circuit which uses the problem of finding a shortest path in an oriented acyclic graph for making certain updates between any two successive iterations. For this NP-hard problem, we give an approximation algorithm.
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