8: Conclusions

[Pram90] A. Pramanick, S. Reddy, " On the design of path delay fault testable combinational circuits " , Proc. at time t. After the application of the next clock the contents of the even flip-flops of the LFSR are shifted into the odd ones (see Figure 10b) producing the second vector. The content of the first output is derived by XORing the outputs of some flip-flops including the last one. Note that the number of inputs of the XOR gate and the flip-flops which feed its inputs depend on the derivation polynomial of the LFSR. Regardless the outputs of those flip-flops which are connected to the inputs of the XOR gate, the content of the first flip-flop can be inverted (when the output of the last flip-flop is a one) or can be unchanged (when the output of the last flip-flop is a zero). As a result, there is a unique state of the LFSR which allows the required pair of vectors to be generated on its odd outputs. A similar proof can be continued easily for any k more than 2. u Thus, the result of the Lemma can be used for testing delay faults in the combinational circuits of the BIST micropipeline. For this purpose the number of latches in the BILBO registers (see Figure 6) must be doubled by adding one extra D-type flip-flop after each register latch. Note that the outputs of the extra flip-flops are held at zero during normal operation mode. The linear feedback of the BILBO register must be changed according to the new derivation polynomial for the LFSR with the double length. As a result, the BILBO register operating in the LFSR mode generates all possible pairs of binary combinations on the inputs of the corresponding combinational circuit. After the period of such a LFSR all possible paths inside the combi-national circuit can be tested which, in turn, guarantees the detection of bundled-data violations in the corresponding stage of the BIST micropipeline. 7: Analysis of the BIST micropipeline structure The BIST technique for micropipelines presented in this paper has advantages and disadvantages. Advantages • The BIST micropipeline structure shown in Figure 6 allows the generation of random tests and the collection of the test results on the chip. • The combinational circuits of the micropipeline are tested separately at the normal circuit speed, making possible the application of a large number of …